1. 15 3月, 2007 1 次提交
  2. 08 3月, 2007 2 次提交
  3. 05 3月, 2007 1 次提交
    • E
      [PATCH] msi: sanely support hardware level msi disabling · f5f2b131
      Eric W. Biederman 提交于
      In some cases when we are not using msi we need a way to ensure that the
      hardware does not have an msi capability enabled.  Currently the code has been
      calling disable_msi_mode to try and achieve that.  However disable_msi_mode
      has several other side effects and is only available when msi support is
      compiled in so it isn't really appropriate.
      
      Instead this patch implements pci_msi_off which disables all msi and msix
      capabilities unconditionally with no additional side effects.
      
      pci_disable_device was redundantly clearing the bus master enable flag and
      clearing the msi enable bit.  A device that is not allowed to perform bus
      mastering operations cannot generate intx or msi interrupt messages as those
      are essentially a special case of dma, and require bus mastering.  So the call
      in pci_disable_device to disable msi capabilities was redundant.
      
      quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off.
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      Cc: Michael Ellerman <michael@ellerman.id.au>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f5f2b131
  4. 20 2月, 2007 2 次提交
    • R
      backlight: Separate backlight properties from backlight ops pointers · 599a52d1
      Richard Purdie 提交于
      Per device data such as brightness belongs to the indivdual device
      and should therefore be separate from the the backlight operation
      function pointers. This patch splits the two types of data and
      allows simplifcation of some code.
      Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>
      599a52d1
    • R
      backlight: Fix external uses of backlight internal semaphore · 28ee086d
      Richard Purdie 提交于
      backlight_device->sem has a very specific use as documented in the
      header file. The external users of this are using it for a different
      reason, to serialise access to the update_status() method.
      
      backlight users were supposed to implement their own internal
      serialisation of update_status() if needed but everyone is doing
      things differently and incorrectly. Therefore add a global mutex to
      take care of serialisation for everyone, once and for all.
      
      Locking for get_brightness remains optional since most users don't
      need it.
      
      Also update the lcd class in a similar way.
      Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>
      28ee086d
  5. 18 2月, 2007 1 次提交
  6. 17 2月, 2007 1 次提交
  7. 16 2月, 2007 1 次提交
  8. 15 2月, 2007 2 次提交
  9. 14 2月, 2007 4 次提交
  10. 13 2月, 2007 7 次提交
  11. 12 2月, 2007 3 次提交
  12. 10 2月, 2007 1 次提交
  13. 08 2月, 2007 4 次提交
  14. 07 2月, 2007 10 次提交
    • K
      [POWERPC] Fixup error handling when emulating a floating point instruction · 5fad293b
      Kumar Gala 提交于
      When we do full FP emulation its possible that we need to post a SIGFPE based
      on the results of the emulation.  The previous code ignored this case completely.
      
      Additionally, the Soft_emulate_8xx case had two issues.  One, we should never
      generate a SIGFPE since the code only does data movement.  Second, we were
      interpreting the return codes incorrectly, it returns 0 on success, 1 on
      illop and -EFAULT on a data access error.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      5fad293b
    • K
      [POWERPC] Enable interrupts if we are doing fp math emulation · 04903a30
      Kumar Gala 提交于
      Anytime we are emulating an instruction we are going to be doing some form of
      get_user() to get the instruction image to decode.  Since get_user() might
      sleep we need to ensure we have interrupts enabled or we might see something
      like:
      
      Debug: sleeping function called from invalid context at arch/powerpc/kernel/traps.c:697
      in_atomic():0, irqs_disabled():1
      Call Trace:
      [D6023EB0] [C0007F84] show_stack+0x58/0x174 (unreliable)
      [D6023EE0] [C0022C34] __might_sleep+0xbc/0xd0
      [D6023EF0] [C000D158] program_check_exception+0x1d8/0x4fc
      [D6023F40] [C000E744] ret_from_except_full+0x0/0x4c
      --- Exception: 700 at 0x102a7100
          LR = 0xdb9ef04
      
      However, we want to ensure that interrupts are disabled when handling a trap
      exception that might be used for a kernel breakpoint.  This is why ProgramCheck
      is marked as EXC_XFER_STD instead of EXC_XFER_EE.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      04903a30
    • K
      [POWERPC] Added kprobes support to ppc32 · 82090035
      Kumar Gala 提交于
      Added kprobes to ppc32 platforms that have use single_step_exception.  This
      excludes 4xx and anything Book-E since their debug mechanisms for single stepping
      are completely different.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      82090035
    • P
      [POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace · e56a6e20
      Paul Mackerras 提交于
      Some instruction tracing tools use the RI (recoverable interrupt) bit
      in the MSR to indicate when it's safe to single-step.  Currently we
      clear RI after restoring r13 when returning to userspace.  However,
      if we single-step past the point where r13 is restored, we'll corrupt
      r13 in the exception entry code and not restore it.  This moves the
      clearing of RI to just before r13 is restored so this doesn't happen.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e56a6e20
    • L
      [POWERPC] Fix performance monitor exception · 449d846d
      Livio Soares 提交于
      To the issue: some point during 2.6.20 development, Paul Mackerras
      introduced the "lazy IRQ  disabling" patch (very cool work,  BTW).
      In that patch, the performance monitor unit exception was marked as
      "maskable", in the sense that if interrupts were soft-disabled, that
      exception could be ignored.  This broke my PowerPC profiling code.
      The symptom that I see is that a varying number of interrupts
      (from 0 to $n$, typically closer to 0) get delivered, when, in
      reality, it should always be very close to $n$.
      
      The issue stems from the way masking is being done.   Masking in
      this fashion seems to  work well with the decrementer and external
      interrupts, because they are raised again until "really"  handled.
      For the PMU, however, this does not apply (at least on my Xserver
      machine with a 970FX processor).  If the PMU exception is not handled,
      it will _not_ be re-raised (at least on my machine).  The documentation
      states that the PMXE bit in MMCR0 is set to 0 when the PMU exception
      is raised.  However, software must re-set the bit to re-enable PMU
      exceptions.  If the exception is ignored (as currently) not only is
      that interrupt lost, but because software does not re-set PMXE, the
      PMU registers are "frozen" forever.
      
      [This patch means that performance monitor exceptions are taken and
      handled even if irqs are off, as long as some other interrupt hasn't
      come along and caused interrupts to be hard-disabled.  In this sense
      the PMU exception becomes like an NMI.  The oprofile code for most
      powerpc processors does nothing that is unsafe in an NMI context, but
      the Cell oprofile code does a spin_lock_irqsave.  However, that turns
      out to be OK because Cell doesn't actually use the performance
      monitor exception; performance monitor interrupts come in as a
      regular interrupt on Cell, so will be disabled when irqs are off.
       -- paulus.]
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      449d846d
    • D
      [POWERPC] Compile fixes for arch/powerpc dcr code · a2c70211
      David Gibson 提交于
      The new dcr code does not currently compile when configured for native
      DCR access on ARCH=powerpc.  This patch fixes the problems.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a2c70211
    • O
      [POWERPC] pasemi: Idle loops · 1199919b
      Olof Johansson 提交于
      Powersave support on PA6T. Right now it only uses 'doze' mode, and
      will default to no savings (spin).
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1199919b
    • O
      [POWERPC] pasemi: UART udbg support · 39c870d5
      Olof Johansson 提交于
      Early debug output for PA Semi UART. Uses the 2.05 CI real mode ops.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      39c870d5
    • I
      [POWERPC] Celleb: support udbg · d7480a9f
      Ishizaki Kou 提交于
      This patch adds udbg support for Celleb platform.
      Signed-off-by: NKou Ishizaki <kou.ishizaki@toshiba.co.jp>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      d7480a9f
    • O
      [POWERPC] PA6T PMC support · 6529c13d
      Olof Johansson 提交于
      Support for PA6T-style PMC registers.
      
      PMCs are completely implementation-dependent on PPC, and PA6T numbers them
      differently from the IBM model.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      6529c13d