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  1. 06 7月, 2007 4 次提交
    • R
      [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores · 4b3e975e
      由 Ralf Baechle 提交于 
      The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4b3e975e
    • R
      [MIPS] Add macros to encode processor revisions. · fde97822
      由 Ralf Baechle 提交于 
      Older processors used to encode processor version and revision in two
4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
have switched to use the 8-bits as 3:3:2 bitfield with the last field as
the patch number.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      fde97822
    • R
      [MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR. · 075c733e
      由 Ralf Baechle 提交于 
      The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
opposes it being called that) where invalid instructions in the same
I-cache line worth of instructions being fetched may case spurious
exceptions.

The workaround for this was only enabled for E9000 cores; enable it also
for all RM7000-based platforms.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      075c733e
    • A
      [MIPS] 64-bit TO_PHYS_MASK macro for RM9000 processors · 5a197095
      由 Andrew Sharp 提交于 
      Signed-off-by: NAndrew Sharp <tigerand@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      5a197095
  3. 04 7月, 2007 3 次提交
  5. 27 6月, 2007 3 次提交
  7. 21 6月, 2007 1 次提交
  9. 15 6月, 2007 1 次提交
  11. 12 6月, 2007 3 次提交
  13. 07 6月, 2007 3 次提交
  15. 22 5月, 2007 1 次提交
    • A
      Detach sched.h from mm.h · e8edc6e0
      由 Alexey Dobriyan 提交于 
      First thing mm.h does is including sched.h solely for can_do_mlock() inline
function which has "current" dereference inside. By dealing with can_do_mlock()
mm.h can be detached from sched.h which is good. See below, why.

This patch
a) removes unconditional inclusion of sched.h from mm.h
b) makes can_do_mlock() normal function in mm/mlock.c
c) exports can_do_mlock() to not break compilation
d) adds sched.h inclusions back to files that were getting it indirectly.
e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were
   getting them indirectly

Net result is:
a) mm.h users would get less code to open, read, preprocess, parse, ... if
   they don't need sched.h
b) sched.h stops being dependency for significant number of files:
   on x86_64 allmodconfig touching sched.h results in recompile of 4083 files,
   after patch it's only 3744 (-8.3%).

Cross-compile tested on

	all arm defconfigs, all mips defconfigs, all powerpc defconfigs,
	alpha alpha-up
	arm
	i386 i386-up i386-defconfig i386-allnoconfig
	ia64 ia64-up
	m68k
	mips
	parisc parisc-up
	powerpc powerpc-up
	s390 s390-up
	sparc sparc-up
	sparc64 sparc64-up
	um-x86_64
	x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig

as well as my two usual configs.
Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e8edc6e0
  17. 12 5月, 2007 1 次提交
  19. 11 5月, 2007 10 次提交
  21. 10 5月, 2007 1 次提交
  23. 09 5月, 2007 9 次提交