- 04 4月, 2015 4 次提交
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由 Andy Gross 提交于
This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: NAndy Gross <agross@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Andy Gross 提交于
This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: NAndy Gross <agross@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Andy Gross 提交于
This patch adds TCSR support for use by the GSBI to automatically configure ADM CRCI values based on the GSBI port configuration. Signed-off-by: NAndy Gross <agross@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Olof Johansson 提交于
Reported-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 02 4月, 2015 1 次提交
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由 Olof Johansson 提交于
File uses dash in the filename, not underscore. Reported-by: NRussell King <linux@arm.linux.org.uk> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 25 3月, 2015 3 次提交
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由 Eliad Peller 提交于
Now that we have wlcore device-tree bindings in place (for both wl12xx and wl18xx), remove the legacy wl12xx_platform_data struct, and move its members into the platform device data (that is passed to wlcore) Davinci 850 is the only platform that still set the platform data in the legacy way (and doesn't have DT bindings), so remove the relevant code/Kconfig option from the board file (as suggested by Sekhar Nori) Since no one currently uses wlcore_spi, simply remove its platform data support (DT bindings will have to be added if someone actually needs it) Signed-off-by: NLuciano Coelho <luca@coelho.fi> Signed-off-by: NEliad Peller <eliad@wizery.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NKalle Valo <kvalo@codeaurora.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Eliad Peller 提交于
Replace all the pdata-quirks for setting wl12xx/wl18xx platform data with proper DT definitions. Signed-off-by: NEliad Peller <eliad@wizery.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Acked-by: NEnric Balletbo i Serra <eballetbo@gmail.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Tested-by: NTony Lindgren <tony@atomide.com> Acked-by: NKalle Valo <kvalo@codeaurora.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Luciano Coelho 提交于
Instead of defining an enumeration with the FW specific values for the different clock rates, use the actual frequency instead. Also add a boolean to specify whether the clock is XTAL or not. Change all board files to reflect this. Signed-off-by: NLuciano Coelho <luca@coelho.fi> [Eliad - small fixes, update board file changes] Signed-off-by: NEliad Peller <eliad@wizery.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NKalle Valo <kvalo@codeaurora.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 3月, 2015 11 次提交
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由 Nicolas Ferre 提交于
For the SAMA5D4 SoC, some LCD lines are in conflict with useful peripherals. Remove these lines and the lowest significant bit of a 24 bit LCD. It gives us a RGB 777 configuration. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> -
由 Nicolas Ferre 提交于
The color arrangement for SAMA5D4 in RGB 666 takes the most significant bits of each color line groups. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> -
由 Boris Brezillon 提交于
Add HLCDC node. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
Add LCDC pin definitions. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> -
由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
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由 Boris Brezillon 提交于
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs (i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
Define alternative pin muxing for the LCDC pins. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444, RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen RGB mode. Split pin definitions to be able to set pin config according to the selected mode. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> -
由 Nicolas Ferre 提交于
Enable RTC for all the at91sam9x5 CPU Modules: this will enable it for all the EK boards. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 3月, 2015 13 次提交
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由 Luciano Coelho 提交于
The platform_quirk element in the platform data was used to change the way the IRQ is triggered. When set, the EDGE_IRQ quirk would change the irqflags used and treat edge trigger differently from the rest. Instead of hiding this irq flag setting behind the quirk, have the board files set the irq_trigger explicitly. This will allow us to use standard irq DT definitions later on. Signed-off-by: NLuciano Coelho <luca@coelho.fi> [Eliad - rebase, add irq_trigger field and pass it, update board file changes] Signed-off-by: NEliad Peller <eliad@wizery.com> Tested-by: NNikita Kiryanov <nikita@compulab.co.il> Acked-by: NKalle Valo <kvalo@codeaurora.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Mark Jackson 提交于
Update dts file to reflect:- * new flash memory layout * add missing phy-mode property * dual_emac now just a boolean * rename mcp to microchip * update gpio definition Signed-off-by: NMark Jackson <mpfj@newflow.co.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sakari Ailus 提交于
Add support for the primary camera of the Nokia N950 and N9. Signed-off-by: NSakari Ailus <sakari.ailus@iki.fi> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sakari Ailus 提交于
The resources the ISP needs are slightly different on 3[45]xx and 3[67]xx. Especially the phy-type property is different. Signed-off-by: NSakari Ailus <sakari.ailus@iki.fi> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> [tony@atomide.com: use omap3_scm_general instead of scm_conf for now] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Brian Norris 提交于
This L2 controller handles multiplexing a few different interrupts. We also need it for configuring the interrupt forwarding masks for the UART. With this, we can *now* boot BCM7445 to a prompt using the upstream kernel + DTB. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Pali Rohár 提交于
These files are not used by any DTS file anymore. Signed-off-by: NPali Rohár <pali.rohar@gmail.com> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Brian Norris 提交于
This value makes much more sense in decimal. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Pali Rohár 提交于
This patch just move content of file omap34xx-hs.dtsi into omap3-tao3530.dts. There is no code change, patch is just preparation for removing -hs file. Signed-off-by: NPali Rohár <pali.rohar@gmail.com> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Pali Rohár 提交于
This patch moves content of file omap34xx-hs.dtsi into omap3-n900.dts and enable omap sham support (omap HW support for SHA + MD5). After testing both omap hwmod and omap-sham.ko drivers it looks like signed Nokia X-Loader enable L3 firewall for omap sham. There is no kernel crash with both official bootloader and crypto enable bootloader. So we can safely enable sham code. Signed-off-by: NPali Rohár <pali.rohar@gmail.com> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Pali Rohár 提交于
Harmattan system on Nokia N9 and N950 devices uses omap crypto support. Bootloader on those devices is known that it enables HW crypto support. This patch just include omap36xx.dtsi directly, so aes and sham is enabled. Signed-off-by: NPali Rohár <pali.rohar@gmail.com> Acked-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
On dm816x we have no PIN_INPUT vs PIN_OUTPUT configuration, there are just pulls. Let's remove the bogus flags. Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> -
由 Tony Lindgren 提交于
Looks like we have cppi41 on dm816x just like on am335x. Cc: Bin Liu <binmlist@gmail.com> Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> -
由 Tony Lindgren 提交于
Commit a54879a0 ("ARM: dts: Fix USB dts configuration for dm816x") attempted to fix the USB features introduced by commit 7800064b ("ARM: dts: Add basic dm816x device tree configuration") but obviously I did not read the dmesg as more USB issues still keep trickling in. It should be usb1_pins instead not usb0_pins for the second interface to avoid warnings from pinctrl framework. Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 18 3月, 2015 2 次提交
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由 Maxime Ripard 提交于
The Armada 385 AP board has a USB3 port exposed that uses a GPIO to drive the VBUS line. Enable the needed drivers to support this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Roger Quadros 提交于
Now that we have EXTCON_USB_GPIO queued for v4.1, revert commit addfcde7 ("ARM: dts: dra7x-evm: beagle-x15: Fix USB Host") On these EVMs, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). Gets USB peripheral mode to work on this EVM. Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com>
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- 17 3月, 2015 6 次提交
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由 Ezequiel Garcia 提交于
The Armada 380 and 385 SoCs have a Cortex-A9 CPU, so the PMU is available to be used. This commit enables it in the devicetree. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Ezequiel Garcia 提交于
The Armada 375 SoC has a Cortex-A9 CPU, and so the PMU is available to be used. This commit enables it in the devicetree. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Maxime Ripard 提交于
The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a Performance Monitoring Unit. Enable it so that we can have hardware-assisted perf support. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Peter Ujfalusi 提交于
AM57xx does not have ATL block integrated. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
Remove the 'ti,timer-dsp' and 'ti,timer-pwm' properties from the timer nodes that still have them. This seems to be copied from OMAP5, on which only certain timers are capable of providing PWM functionality or be able to interrupt the DSP. All the GPTimers On DRA7 are capable of PWM and interrupting any core (due to the presence of Crossbar). These properties were used by the driver to add capabilities to each timer, and support requesting timers by capability. In the DT world, we expect any users of timers to use phandles to the respective timer, and use the omap_dm_timer_request_by_node() API. The API to request using capabilities, omap_dm_timer_request_by_cap() API should be deprecated eventually. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Marek Belisko 提交于
ti,codec property is not used (parsed) in omap-twl4030 driver. The ti,twl4030-audio which ti,codec points by phandle is mfd driver and device for ASoC codec is created w/o DT compatible string. Removing all references in DT files. Signed-off-by: NMarek Belisko <marek@goldelico.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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