- 13 12月, 2013 3 次提交
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由 Jon Cooper 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
The addition of RX event merging support means we don't reliably detect dropped RX events now. Currently we will only detect them if the previous event for the RX queue had the CONT bit set. Only accept RX completion events as merged if the GET_CAPABILITIES_OUT_RX_BATCHING bit is set in datapath_caps (which it won't be for the low-latency datapath) and the CONT bit is not set on the event. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Jon Cooper 提交于
To run BISTs the MC goes down in to a special mode where it will only respond to MCDI from the testing PF, and TX, RX and event queues are torn down. Other PFs get a message as it goes down to tell them it's going down. When the other PFs get this message, they check the soft status register to tell when the MC has rebooted after BIST mode and they can start recovery. [bwh: Convert the test result to 1 or -1 as for earlier NICs] Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 07 12月, 2013 10 次提交
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Robert Stonehouse 提交于
The MC firmware is cooperatively multitasking and its scheduler will send an event when a task yields after running for more than the expected maximum time. This can be useful for firmware development but does not usually indicate a serious error and does not help to detect a lockup (there is a hardware watchdog that does that). Change the message and reduce log level accordingly. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Robert Stonehouse 提交于
There is an as-yet unexplained bug that sometimes prevents (or delays) the driver seeing the completion event for a completed MCDI request on the SFC9120. The requested configuration change will have happened but the driver assumes it to have failed, and this can result in further failures. We can mitigate this by polling for completion after unsuccessfully waiting for an event. Fixes: 8127d661 ('sfc: Add support for Solarflare SFC9100 family') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Robert Stonehouse 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Andrew Rybchenko 提交于
rx_prefix_size is 4-bytes aligned on Falcon/Siena (16 bytes), but it is equal to 14 on EF10. So, it should be taken into account if arch requires IP header to be 4-bytes aligned (via NET_IP_ALIGN). Fixes: 8127d661 ('sfc: Add support for Solarflare SFC9100 family') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
There is a single MCDI PTP operation for setting the frequency adjustment and applying a time offset to the hardware clock. When applying a time offset we should not change the frequency adjustment. These two operations can now be requested separately but this requires a flash firmware update. Keep using the single operation, but remember and repeat the previous frequency adjustment. Fixes: 7c236c43 ('sfc: Add support for IEEE-1588 PTP') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Alexandre Rames 提交于
This disables PTP when we bring the interface down to avoid getting unmatched RX timestamp events, and tries to re-enable it when bringing the interface up. [bwh: Make efx_ptp_stop() safe on Falcon. Introduce efx_ptp_{start,stop}_datapath() functions; we'll expand them later.] Fixes: 7c236c43 ('sfc: Add support for IEEE-1588 PTP') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
In case of a flood of PTP packets, the timestamp peripheral and MC firmware on the SFN[56]322F boards may not be able to provide timestamp events for all packets. Don't complain too much about this. Fixes: 7c236c43 ('sfc: Add support for IEEE-1588 PTP') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Laurence Evans 提交于
Limit syslog flood if a PTP packet storm occurs. Fixes: 7c236c43 ('sfc: Add support for IEEE-1588 PTP') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
efx_ptp_is_ptp_tx() must be robust against skbs from raw sockets that have invalid IPv4 and UDP headers. Add checks that: - the transport header has been found - there is enough space between network and transport header offset for an IPv4 header - there is enough space after the transport header offset for a UDP header Fixes: 7c236c43 ('sfc: Add support for IEEE-1588 PTP') Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 30 11月, 2013 1 次提交
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由 Guenter Roeck 提交于
Simplify the code. Avoid race conditions caused by attributes being created after hwmon device registration. Implicitly (through hwmon API) add mandatory 'name' sysfs attribute. Reviewed-by: NBen Hutchings <bhutchings@solarflare.com> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 11月, 2013 1 次提交
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 01 11月, 2013 1 次提交
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由 Alexandre Rames 提交于
When using firmware assisted TSO, we use a single DMA mapping for the linear area of a TSO skb. We still have to segment the super-packet and insert a descriptor containing the original headers before each segment of payload, so we can unmap the linear area only after the last segment is completed. The unmapping information for the linear area is therefore associated with the last header descriptor. We calculate the DMA address to unmap from using the map length and the invariant that the end of the DMA mapping matches the end of the data referenced by the last descriptor. But this invariant is broken when there is TCP payload in the linear area. Fix this by adding and using an explicit dma_offset field. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 08 10月, 2013 1 次提交
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由 Ben Hutchings 提交于
Although we do not yet enable multiple PFs per port, it is possible that a board will be reconfigured to enable them while the driver has not yet been updated to fully support this. The most obvious problem is that multiple functions may try to set conflicting link settings. But we will also run into trouble if the firmware doesn't consider us fully trusted. So, abort probing unless both the LinkCtrl and Trusted flags are set for this function. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 05 10月, 2013 5 次提交
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由 Edward Cree 提交于
Recognise the new Packet Memory and RX Data Path counters. The following counters are added: rx_pm_{trunc,discard}_bb_overflow - burst buffer overflowed. This should not occur if BB correctly configured. rx_pm_{trunc,discard}_vfifo_full - not enough space in packet memory. May indicate RX performance problems. rx_pm_{trunc,discard}_qbb - dropped by 802.1Qbb early discard mechanism. Since Qbb is not supported at present, this should not occur. rx_pm_discard_mapping - 802.1p priority configured to be dropped. This should not occur in normal operation. rx_dp_q_disabled_packets - packet was to be delivered to a queue but queue is disabled. May indicate misconfiguration by the driver. rx_dp_di_dropped_packets - parser-dispatcher indicated that a packet should be dropped. rx_dp_streaming_packets - packet was sent to the RXDP streaming bus, ie. a filter directed the packet to the MCPU. rx_dp_emerg_{fetch,wait} - RX datapath had to wait for descriptors to be loaded. Indicates performance problems but not drops. These are only provided if the MC firmware has the PM_AND_RXDP_COUNTERS capability. Otherwise, mask them out. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Matthew Slattery 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Edward Cree 提交于
Previously, efx_ef10_stat_mask returned a static const unsigned long[], which meant that each possible mask had to be declared statically with STAT_MASK_BITMAP. Since adding a condition would double the size of the decision tree, we now create the bitmask dynamically. To do this, we have two functions efx_ef10_raw_stat_mask, which returns a u64, and efx_ef10_get_stat_mask, which fills in an unsigned long * argument. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Edward Cree 提交于
The indices in nic_data->stats need to match the EF10_STAT_whatever enum values. In efx_nic_update_stats, only mask; gaps are removed in efx_ef10_update_stats. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Jon Cooper 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 25 9月, 2013 1 次提交
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由 Joe Perches 提交于
There are a mix of function prototypes with and without extern in the kernel sources. Standardize on not using extern for function prototypes. Function prototypes don't need to be written with extern. extern is assumed by the compiler. Its use is as unnecessary as using auto to declare automatic/local variables in a block. Signed-off-by: NJoe Perches <joe@perches.com>
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- 22 9月, 2013 1 次提交
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由 Russell King 提交于
Replace the following sequence: dma_set_mask(dev, mask); dma_set_coherent_mask(dev, mask); with a call to the new helper dma_set_mask_and_coherent(). Acked-by: NBen Hutchings <bhutchings@solarflare.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 9月, 2013 12 次提交
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由 Ben Hutchings 提交于
Extend efx_filter_rfs() to map TCP/IPv6 and UDP/IPv6 flows into efx_filter_spec. These are only supported on EF10; on Falcon and Siena they will be rejected by efx_farch_filter_from_gen_spec(). Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Jon Cooper 提交于
Sufficiently small linear packets can be copied into the PIO buffer with a single call to memcpy_toio(). Non-linear packets require an intermediate cache-line-sized buffer. [bwh: I wrote the first version of this, but Jon did the hard work to handle non-linear packets.] Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Try to allocate a segment of PIO buffer to each TX channel. If allocation fails, log an error but continue. PIO buffers must be mapped separately from the NIC registers, with write-combining enabled. Where the host page size is 4K, we could potentially map each VI's registers and PIO buffer separately. However, this would add significant complexity, and we also need to support architectures such as POWER which have a greater page size. So make a single contiguous write-combining mapping after the uncacheable mapping, aligned to the host page size, and link PIO buffers there. Where necessary, allocate additional VIs within the write-combining mapping purely for access to PIO buffers. Link all TX buffers to TX queues and the additional VIs in efx_ef10_dimension_resources() and in efx_ef10_init_nic() after an MC reboot. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Segmentation remains in the driver, but we generate option descriptors describing the required packet editing rather than making our own copies. Reduce tso_state::ipv4_id to 16 bits, so it doesn't overflow into the TCP_FLAGS field of the option descriptor. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
There are very few readable registers, but we may as well report them. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Fengguang Wu 提交于
Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Fengguang Wu 提交于
Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Daniel Pieczko 提交于
The SFC9120 MC firmware often takes longer than 20ms to reboot and update the warm boot count in BIU_MC_SFT_STATUS_REG. A timeout of 250ms is very generous for an MC reboot. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Daniel Pieczko 提交于
Scheduling a reset following an MC reboot event before waiting for reboot to complete results in a race that can lead to a state where must_realloc_vis is false in efx_ef10_fini_dmaq() but the VIs have been destroyed during the MC reboot. To avoid MC errors when trying to remove VIs that do not exist, wait for the MC reboot to complete before scheduling the reset. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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- 11 9月, 2013 4 次提交
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由 Ben Hutchings 提交于
After an MC reboot, the datapath may be running a different firmware variant and have different capabilities. It is critical that we know the current capabilities so that we can pass valid flags to MC_CMD_INIT_EVQ. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Rename efx_ef10_init_capabilities() to the more specific efx_ef10_init_datapath_caps(). Stop accepting short responses to MC_CMD_GET_CAPABILITIES; we don't need to support pre-production firmware. Move the check for RX prefix support from efx_ef10_probe() into efx_ef10_init_datapath_caps() and use consistent error messages for missing TSO support and missing RX prefix support. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
If the MC reboots then the stats it reports to us will have been reset. We need to reset ours to get efx_update_diff_stat() working properly. (This is a re-run of commit 876be083 'sfc: Reset driver's MAC stats after MC reboot seen'.) Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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由 Ben Hutchings 提交于
Unlike Siena where timestamping is provided by a peripheral, EF10 delivers RX timestamps in the packet prefix. However the driver doesn't yet support this. We are also creating a PHC device for each EF10 function, even though the clock is really shared between all of them. Disable hardware PTP/timestamping support until it's complete. Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
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