1. 01 12月, 2010 1 次提交
    • P
      sh: Assume new page cache pages have dirty dcache lines. · 55661fc1
      Paul Mundt 提交于
      This follows the ARM change c0177800
      ("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the
      same rationale:
      
          There are places in Linux where writes to newly allocated page
          cache pages happen without a subsequent call to flush_dcache_page()
          (several PIO drivers including USB HCD). This patch changes the
          meaning of PG_arch_1 to be PG_dcache_clean and always flush the
          D-cache for a newly mapped page in update_mmu_cache().
      
      This addresses issues seen with executing binaries from MMC, in
      addition to some of the other HCDs that don't explicitly do cache
      management for their pipe-in buffers.
      Requested-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      55661fc1
  2. 26 1月, 2010 1 次提交
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      sh: Mass ctrl_in/outX to __raw_read/writeX conversion. · 9d56dd3b
      Paul Mundt 提交于
      The old ctrl in/out routines are non-portable and unsuitable for
      cross-platform use. While drivers/sh has already been sanitized, there
      is still quite a lot of code that is not. This converts the arch/sh/ bits
      over, which permits us to flag the routines as deprecated whilst still
      building with -Werror for the architecture code, and to ensure that
      future users are not added.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      9d56dd3b
  3. 21 1月, 2010 1 次提交
  4. 10 10月, 2009 1 次提交
    • M
      sh: Obliterate the P1 area macros · 8bd642b1
      Matt Fleming 提交于
      Replace the use of PHYSADDR() with __pa(). PHYSADDR() is based on the
      idea that all addresses in P1SEG are untranslated, so we can access an
      address's physical page as an offset from P1SEG. This doesn't work for
      CONFIG_PMB/CONFIG_PMB_FIXED because pages in P1SEG and P2SEG are used
      for PMB mappings and so can be translated to any physical address.
      
      Likewise, replace a P1SEGADDR() use with virt_to_phys().
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8bd642b1
  5. 09 10月, 2009 1 次提交
  6. 15 9月, 2009 1 次提交
  7. 01 9月, 2009 1 次提交
  8. 21 8月, 2009 2 次提交
  9. 15 8月, 2009 1 次提交
  10. 22 7月, 2009 1 次提交
    • P
      sh: Migrate from PG_mapped to PG_dcache_dirty. · 2277ab4a
      Paul Mundt 提交于
      This inverts the delayed dcache flush a bit to be more in line with other
      platforms. At the same time this also gives us the ability to do some
      more optimizations and cleanup. Now that the update_mmu_cache() callsite
      only tests for the bit, the implementation can gradually be split out and
      made generic, rather than relying on special implementations for each of
      the peculiar CPU types.
      
      SH7705 in 32kB mode and SH-4 still need slightly different handling, but
      this is something that can remain isolated in the varying page copy/clear
      routines. On top of that, SH-X3 is dcache coherent, so there is no need
      to bother with any of these tests in the PTEAEX version of
      update_mmu_cache(), so we kill that off too.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      2277ab4a
  11. 28 1月, 2008 1 次提交
  12. 05 3月, 2007 1 次提交
  13. 13 2月, 2007 2 次提交
    • P
      sh: Fixup cpu_data references for the non-boot CPUs. · 11c19656
      Paul Mundt 提交于
      There are a lot of bogus cpu_data-> references that only end up working
      for the boot CPU, convert these to current_cpu_data to fixup SMP.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      11c19656
    • P
      sh: Lazy dcache writeback optimizations. · 26b7a78c
      Paul Mundt 提交于
      This converts the lazy dcache handling to the model described in
      Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
      used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
      bonus, this slightly cuts down on the cache flushing frequency.
      
      With that and the PTEA handling out of the way, the update_mmu_cache()
      implementations can be consolidated, and we no longer have to worry
      about which configuration the cache is in for the SH7705 case.
      
      And finally, explicitly disable the lazy writeback on SMP (SH-4A).
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      26b7a78c
  14. 27 9月, 2006 1 次提交
  15. 26 9月, 2006 1 次提交
    • D
      [PATCH] Standardize pxx_page macros · 46a82b2d
      Dave McCracken 提交于
      One of the changes necessary for shared page tables is to standardize the
      pxx_page macros.  pte_page and pmd_page have always returned the struct
      page associated with their entry, while pte_page_kernel and pmd_page_kernel
      have returned the kernel virtual address.  pud_page and pgd_page, on the
      other hand, return the kernel virtual address.
      
      Shared page tables needs pud_page and pgd_page to return the actual page
      structures.  There are very few actual users of these functions, so it is
      simple to standardize their usage.
      
      Since this is basic cleanup, I am submitting these changes as a standalone
      patch.  Per Hugh Dickins' comments about it, I am also changing the
      pxx_page_kernel macros to pxx_page_vaddr to clarify their meaning.
      Signed-off-by: NDave McCracken <dmccr@us.ibm.com>
      Cc: Hugh Dickins <hugh@veritas.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      46a82b2d
  16. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4