1. 26 8月, 2017 2 次提交
  2. 18 8月, 2017 1 次提交
    • M
      genirq/proc: Use the the accessor to report the effective affinity · 6bc6d4ab
      Marc Zyngier 提交于
      If CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK is defined, but that the
      interrupt is not single target, the effective affinity reported in
      /proc/irq/x/effective_affinity will be empty, which is not the truth.
      
      Instead, use the accessor to report the affinity, which will pick
      the right mask.
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Kevin Cernekee <cernekee@gmail.com>
      Cc: Wei Xu <xuwei5@hisilicon.com>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Matt Redfearn <matt.redfearn@imgtec.com>
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Link: http://lkml.kernel.org/r/20170818083925.10108-3-marc.zyngier@arm.com
      6bc6d4ab
  3. 23 6月, 2017 4 次提交
  4. 11 2月, 2017 1 次提交
  5. 04 7月, 2016 1 次提交
  6. 10 6月, 2016 2 次提交
  7. 15 2月, 2016 1 次提交
  8. 10 11月, 2015 1 次提交
    • G
      genirq/PM: Restore system wake up from chained interrupts · 4717f133
      Grygorii Strashko 提交于
      Commit e509bd7d ("genirq: Allow migration of chained interrupts
      by installing default action") breaks PCS wake up IRQ behaviour on
      TI OMAP based platforms (dra7-evm).
      
      TI OMAP IRQ wake up configuration:
      GIC-irqchip->PCM_IRQ
        |- omap_prcm_register_chain_handler
           |- PRCM-irqchip -> PRCM_IO_IRQ
              |- pcs_irq_chain_handler
                 |- pinctrl-irqchip -> PCS_uart1_wakeup_irq
      
      This happens because IRQ PM code (irq/pm.c) is expected to ignore
      chained interrupts by default:
        static bool suspend_device_irq(struct irq_desc *desc)
        {
      	if (!desc->action || desc->no_suspend_depth)
      		return false;
       - it's expected !desc->action = true for chained interrupts;
      
      but, after above change, all chained interrupt descriptors will
      have default action handler installed - chained_action.
      As result, chained interrupts will be silently disabled during system
      suspend.
      
      Hence, fix it by introducing helper function irq_desc_is_chained() and
      use it in suspend_device_irq() for chained interrupts identification
      and skip them, once detected.
      
      Fixes: e509bd7d ("genirq: Allow migration of chained interrupts..")
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: <nsekhar@ti.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: Tony Lindgren <tony@atomide.com>
      Link: http://lkml.kernel.org/r/1447149492-20699-1-git-send-email-grygorii.strashko@ti.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4717f133
  9. 10 10月, 2015 1 次提交
    • M
      genirq: Allow migration of chained interrupts by installing default action · e509bd7d
      Mika Westerberg 提交于
      When a CPU is offlined all interrupts that have an action are migrated to
      other still online CPUs. However, if the interrupt has chained handler
      installed this is not done. Chained handlers are used by GPIO drivers which
      support interrupts, for instance.
      
      When the affinity is not corrected properly we end up in situation where
      most interrupts are not arriving to the online CPUs anymore. For example on
      Intel Braswell system which has SD-card card detection signal connected to
      a GPIO the IO-APIC routing entries look like below after CPU1 is offlined:
      
        pin30, enabled , level, low , V(52), IRR(0), S(0), logical , D(03), M(1)
        pin31, enabled , level, low , V(42), IRR(0), S(0), logical , D(03), M(1)
        pin32, enabled , level, low , V(62), IRR(0), S(0), logical , D(03), M(1)
        pin5b, enabled , level, low , V(72), IRR(0), S(0), logical , D(03), M(1)
      
      The problem here is that the destination mask still contains both CPUs even
      if CPU1 is already offline. This means that the IO-APIC still routes
      interrupts to the other CPU as well.
      
      We solve the problem by providing a default action for chained interrupts.
      This action allows the migration code to correct affinity (as it finds
      desc->action != NULL).
      
      Also make the default action handler to emit a warning if for some reason a
      chained handler ends up calling it.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      Link: http://lkml.kernel.org/r/1444039935-30475-1-git-send-email-mika.westerberg@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e509bd7d
  10. 01 10月, 2015 1 次提交
  11. 16 9月, 2015 1 次提交
  12. 12 6月, 2015 1 次提交
  13. 14 2月, 2015 1 次提交
  14. 13 12月, 2014 1 次提交
    • T
      genirq: Prevent proc race against freeing of irq descriptors · c291ee62
      Thomas Gleixner 提交于
      Since the rework of the sparse interrupt code to actually free the
      unused interrupt descriptors there exists a race between the /proc
      interfaces to the irq subsystem and the code which frees the interrupt
      descriptor.
      
      CPU0				CPU1
      				show_interrupts()
      				  desc = irq_to_desc(X);
      free_desc(desc)
        remove_from_radix_tree();
        kfree(desc);
      				  raw_spinlock_irq(&desc->lock);
      
      /proc/interrupts is the only interface which can actively corrupt
      kernel memory via the lock access. /proc/stat can only read from freed
      memory. Extremly hard to trigger, but possible.
      
      The interfaces in /proc/irq/N/ are not affected by this because the
      removal of the proc file is serialized in procfs against concurrent
      readers/writers. The removal happens before the descriptor is freed.
      
      For architectures which have CONFIG_SPARSE_IRQ=n this is a non issue
      as the descriptor is never freed. It's merely cleared out with the irq
      descriptor lock held. So any concurrent proc access will either see
      the old correct value or the cleared out ones.
      
      Protect the lookup and access to the irq descriptor in
      show_interrupts() with the sparse_irq_lock.
      
      Provide kstat_irqs_usr() which is protecting the lookup and access
      with sparse_irq_lock and switch /proc/stat to use it.
      
      Document the existing kstat_irqs interfaces so it's clear that the
      caller needs to take care about protection. The users of these
      interfaces are either not affected due to SPARSE_IRQ=n or already
      protected against removal.
      
      Fixes: 1f5a5b87 "genirq: Implement a sane sparse_irq allocator"
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: stable@vger.kernel.org
      c291ee62
  15. 19 3月, 2014 1 次提交
  16. 24 6月, 2013 1 次提交
    • G
      irqdomain: Include hwirq number in /proc/interrupts · c12d2f42
      Grant Likely 提交于
      Add the hardware interrupt number to the output of /proc/interrupts.
      It is often important to have access to the hardware interrupt number because
      it identifies exactly how an interrupt signal is wired up to the interrupt
      controller.  This is especially important when using irq_domains since irq
      numbers get dynamically allocated in that case, and have no relation to the
      actual hardware number.
      
      Note: This output is currently conditional on whether or not the irq_domain
      pointer is set; however hwirq could still be used without irq_domain.  It
      may be worthwhile to always output the hwirq number regardless of the
      domain pointer.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Tested-by: NOlof Johansson <olof@lixom.net>
      Cc: Ben Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      c12d2f42
  17. 02 5月, 2013 1 次提交
  18. 10 4月, 2013 1 次提交
    • A
      procfs: new helper - PDE_DATA(inode) · d9dda78b
      Al Viro 提交于
      The only part of proc_dir_entry the code outside of fs/proc
      really cares about is PDE(inode)->data.  Provide a helper
      for that; static inline for now, eventually will be moved
      to fs/proc, along with the knowledge of struct proc_dir_entry
      layout.
      Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
      d9dda78b
  19. 23 2月, 2013 1 次提交
  20. 26 5月, 2011 1 次提交
  21. 25 5月, 2011 1 次提交
    • M
      bitmap, irq: add smp_affinity_list interface to /proc/irq · 4b060420
      Mike Travis 提交于
      Manually adjusting the smp_affinity for IRQ's becomes unwieldy when the
      cpu count is large.
      
      Setting smp affinity to cpus 256 to 263 would be:
      
      	echo 000000ff,00000000,00000000,00000000,00000000,00000000,00000000,00000000 > smp_affinity
      
      instead of:
      
      	echo 256-263 > smp_affinity_list
      
      Think about what it looks like for cpus around say, 4088 to 4095.
      
      We already have many alternate "list" interfaces:
      
      /sys/devices/system/cpu/cpuX/indexY/shared_cpu_list
      /sys/devices/system/cpu/cpuX/topology/thread_siblings_list
      /sys/devices/system/cpu/cpuX/topology/core_siblings_list
      /sys/devices/system/node/nodeX/cpulist
      /sys/devices/pci***/***/local_cpulist
      
      Add a companion interface, smp_affinity_list to use cpu lists instead of
      cpu maps.  This conforms to other companion interfaces where both a map
      and a list interface exists.
      
      This required adding a bitmap_parselist_user() function in a manner
      similar to the bitmap_parse_user() function.
      
      [akpm@linux-foundation.org: make __bitmap_parselist() static]
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Jack Steiner <steiner@sgi.com>
      Cc: Lee Schermerhorn <lee.schermerhorn@hp.com>
      Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      4b060420
  22. 03 5月, 2011 1 次提交
  23. 29 3月, 2011 1 次提交
  24. 26 3月, 2011 1 次提交
  25. 17 3月, 2011 1 次提交
  26. 19 2月, 2011 4 次提交
  27. 01 12月, 2010 1 次提交
  28. 12 10月, 2010 1 次提交
  29. 04 10月, 2010 2 次提交
  30. 12 5月, 2010 1 次提交
  31. 03 5月, 2010 1 次提交
    • P
      genirq: Add CPU mask affinity hint · e7a297b0
      Peter P Waskiewicz Jr 提交于
      This patch adds a cpumask affinity hint to the irq_desc structure,
      along with a registration function and a read-only proc entry for each
      interrupt.
      
      This affinity_hint handle for each interrupt can be used by underlying
      drivers that need a better mechanism to control interrupt affinity.
      The underlying driver can register a cpumask for the interrupt, which
      will allow the driver to provide the CPU mask for the interrupt to
      anything that requests it.  The intent is to extend the userspace
      daemon, irqbalance, to help hint to it a preferred CPU mask to balance
      the interrupt into.
      
      [ tglx: Fixed compile warnings, added WARN_ON, made SMP only ]
      Signed-off-by: NPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
      Cc: davem@davemloft.net
      Cc: arjan@linux.jf.intel.com
      Cc: bhutchings@solarflare.com
      LKML-Reference: <20100430214445.3992.41647.stgit@ppwaskie-hc2.jf.intel.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      e7a297b0