1. 28 4月, 2014 1 次提交
  2. 20 12月, 2013 1 次提交
  3. 19 12月, 2013 1 次提交
  4. 17 12月, 2013 4 次提交
  5. 13 8月, 2013 2 次提交
  6. 29 5月, 2013 4 次提交
  7. 18 5月, 2013 2 次提交
  8. 05 4月, 2013 4 次提交
  9. 04 4月, 2013 1 次提交
  10. 12 3月, 2013 1 次提交
  11. 29 1月, 2013 4 次提交
  12. 17 11月, 2012 1 次提交
    • S
      ARM: tegra: harmony: enable HDMI port · 20ffbd7d
      Stephen Warren 提交于
      Enable host1x, and the HDMI output. Harmony also has an optional LCD,
      and a VGA output. The former isn't enabled due to potential issues with
      having multiple outputs enabled. The latter isn't enabled since the
      driver doesn't support VGA yet anyway.
      
      Correct DDC I2C frequency to 100KHz.
      
      Based on work by Thierry Reding for TrimSlice.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      20ffbd7d
  13. 16 11月, 2012 1 次提交
  14. 06 11月, 2012 1 次提交
  15. 21 9月, 2012 1 次提交
  16. 15 9月, 2012 2 次提交
    • S
      ARM: dt: tegra: harmony: configure power off · be972c32
      Stephen Warren 提交于
      Add DT property to tell the TPS6586x that it should provide the
      pm_power_off() implementation. This allows "shutdown" to work.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      be972c32
    • L
      ARM: dt: tegra: harmony: add regulators · 3cc404de
      Laxman Dewangan 提交于
      Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
      couple of fixed GPIO-controlled regulators too.
      
      Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
      and converted to Harmony.
      
      swarren made the following changes:
      * Added ldo0 regulator configuration to device tree, and updated
        board-harmony-pcie.c for the new regulator name.
      * Fixed vdd_1v05's voltage from 10.5V to 1.05V.
      * Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
        run-time from device tree instead of hard-coding it.
      * Removed board-harmony{-power.c,.h} now that they're unused.
      * Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
        this GPIO for now. This will be fixed when the PCIe driver is re-
        written as a driver. The code can't regulator_get("vdd_1v05") right
        now, because the vdd_1v05 regulator's probe gets deferred due to its
        supply being the PMIC, which gets probed after the regulator the first
        time around, and this dependency is only resolved by repeated probing,
        which happens when deferred_probe_initcall() is called, which happens
        in a late initcall, whose runtime order relative to harmony_pcie_init()
        is undefined, since that's also called from a late initcall.
      * Removed unused harmony_pcie_initcall().
      Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      3cc404de
  17. 21 6月, 2012 1 次提交
    • S
      ARM: dt: tegra: rename board files to match SoC · 702b0e4f
      Stephen Warren 提交于
      Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
      change modifies the Tegra board files to be named the same way for
      consistency.
      
      Once a related change is made in U-Boot, this will cause both U-Boot and
      the kernel to use the same names for the .dts files and SoC identifiers,
      thus allowing U-Boot's recently added "soc" and "board" environment
      variables to be used to construct the name of Tegra .dtb files, and hence
      allow board-generic U-Boot bootcmd scripts to be written.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      702b0e4f
  18. 12 6月, 2012 1 次提交
  19. 15 5月, 2012 5 次提交
  20. 26 4月, 2012 2 次提交
    • S
      ARM: dt: tegra: pinmux changes for USB ULPI · 563da21b
      Stephen Warren 提交于
      Ensure that the USB ULPI signals are not tri-stated, and have no pull-
      up or pull-down.
      
      Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or
      PV1 depending on the board, so UAC) is not tri-stated, and has no pull-
      up or pull-down.
      
      This change appears larger than it is due to the grouping and sorting of
      the pin configuration data.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      563da21b
    • S
      ARM: tegra: add USB ULPI PHY reset GPIO to device tree · aa607ebf
      Stephen Warren 提交于
      ULPI PHYs have a reset signal, and different boards use a different GPIO
      for this task. Add a property to device tree to represent this.
      
      I'm not sure if adding this property to the EHCI controller node is
      entirely correct; perhaps eventually we should have explicit separate
      nodes for the various PHYs. However, we don't have that right now, so this
      binding seems like a reasonable choice.
      
      Cc: <devicetree-discuss@lists.ozlabs.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: <linux-usb@vger.kernel.org>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      aa607ebf