GFX has a reset status register (PRM_GFX.RM_GFX_RSTST),
so update the GFX hwmod data with .rstst_off and .st_shift
information.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

OMAP UART IP needs software control for slave idle modes based on functional
state of the IP. i.e The IP slave idle settings should be set to 'noidle' when
being used and then put back to 'smart_idle' when unused. Currently this is
handled by the driver with function pointers implemented in platform code.
This however breaks in case of device tree because of missing idle handling
APIs.

Previous patches in this series added a flag HWMOD_SWSUP_SIDLE_ACTIVE which
takes care of the mentioned requirement. Hence add the flag for all UART IPs
to take advantage of feature supported by framework.

Subsequent patches removes the slave idle handling from driver code.
Tested-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: NSourav Poddar <sourav.poddar@ti.com>
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NKevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>  # OMAP4/Panda
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn
makes sure that sysc idle bit-fields are configured to valid state on
enable/disable callbacks.

With the recent submitted patch from Santosh Shilimkar,
"ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc"
(commit: 4a98c2d89), it is required to add sysconf
information to each valid hwmod entry, else device will not be
come out from idle state properly and leads to below kernel
crash  -

[2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at
0xf9e35034
[2.198325] Internal error: : 1028 [#1] SMP ARM
[2.203101] Modules linked in:
[2.206334] CPU: 0    Not tainted  (3.9.0-rc3-00059-gd114294#1)
[2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60
[2.218090] LR is at omap_wdt_probe+0x184/0x1fc
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>

Update the AES0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Update the SHA0 HIB2 module's hwmod data for the am33xx SoC.
Also, remove it from the '#if 0' block that its currently
inside so the data is actually available for use.

CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

struct omap_hwmod records belonging to wkup m3 domain is missing
HWMOD_NO_IDLEST flags; add them.

This patch is a prerequisite for a subsequent patch, 'ARM: OMAP2:
am33xx-hwmod: Fix "register offset NULL check" bug'.  That patch would
otherwise attempt to read from reserved bits.
Signed-off-by: NHebbar Gururaja <gururaja.hebbar@ti.com>
[paul@pwsan.com: add some more explanation in the patch description]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP & EHRPWM). To handle
resource sharing & IP integration  rework on parent child relation
between PWMSS and ECAP, EQEP & EHRPWM child devices to support runtime PM.
Signed-off-by: NPhilip Avinash <avinashphilip@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

EQEP IP block integration data is not present in HWMOD data. Also
address ranges specified for EACP & EHRPWM are not correct & HWMOD
flags of ADDR_TYPE_RT are added to PWM subsystem register address
space. This patch:
1. Corrects register address mapping for ECAP & EHRPWM
2. Removes  HWMOD flags in PWM submodule register address space.
3. Adds EQEP HWMOD entries.
Signed-off-by: NPhilip Avinash <avinashphilip@ti.com>
[paul@pwsan.com: tweaked patch description]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.

CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
accessing the wrong memory address for idle and standby
operations. Fix this by removing the ADDR_TYPE_RT flag from
the 1st memory region in CPGMAC0 hwmod entry.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START
This led to having a resource list of 100s of IRQs.

Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add
AM33XX HWMOD data) that probably had some search and replace updates
done for the patch for sparse irq support.
Signed-off-by: NPantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated wit information about the breaking commit]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Commit 70384a6a ("ARM: OMAP3+:
hwmod: Add AM33XX HWMOD data for davinci_mdio module") adds two
new sparse warnings:

arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2518:30: warning: symbol 'am33xx_mdio_addr_space' was not declared. Should it be static?
arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2526:26: warning: symbol 'am33xx_cpgmac0__mdio' was not declared. Should it be static?

Fix by marking the two new records as static.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Peter Korsgaard <jacmet@sunsite.dk>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Acked-by: NMugunthan V N <mugunthanvnm@ti.com>

The OMAP_I2C_FLAG_RESET_REGS_POSTIDLE is not used anymore
in the i2c driver. Remove the flag.
Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>

This patch adds hwmod entry for davinci MDIO module,
creating parent<->child relationship between CPSW and MDIO module.

This Parent-child relation is required in order to use common resources
like, clock, but still maintaining the logical separation between them.

CPGMAC SubSystem consist of various sub-modules, like, mdio, cpdma,
cpsw, etc... These sub-modules are also used in some of Davinci
family of devices, so separate and independent platform devices &
drivers for CPSW and MDIO is implemented.
In case of AM33XX, the resources are shared and common register
bit-field is provided to control module/clock enable/disable,
makes it difficult to handle common resources from both drivers.

So the solution is, create parent<->child relationship between
CPGMAC & MDIO modules.
Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NRichard Cochran <richardcochran@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We want to remove plat/cpu.h. To do this, let's first split
it to private soc.h to mach-omap1 and mach-omap2. We have to
keep plat/cpu.h around until the remaining drivers are fixed,
so let's include the local soc.h in plat/cpu.h and for drivers
still including plat/cpu.h.

Once the drivers are fixed not to include plat/cpu.h, we
can remove the file.

This is needed for the ARM common zImage support.

[tony@atomide.com: updated to not print a warning]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Let's make omap_hwmod local to mach-omap2 for
ARM common zImage support.
Signed-off-by: NTony Lindgren <tony@atomide.com>

There's no need to keep the device related things in the
common i2c.c as omap2+ is using hwmod. Split the code to
mach-omap1 and mach-omap2 parts and only leave common
code to plat-omap/i2c.c.

Note that as omap1 only has one i2c controller, we can
now remove the old device related macros.
Reviewed-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Move plat/dma.h to plat-omap/dma-omap.h as part of single
zImage work
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

We need to remove this from plat for ARM common zImage
support.

Also remove includes not needed by the omap_hsmmc.c driver.

Cc: linux-mmc@vger.kernel.org
Acked-by: NChris Ball <cjb@laptop.org>
Acked-by: NVenkatraman S <svenkatr@ti.com>
[tony@atomide.com: fold in removal of unused driver includes]
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM33xx hwmod data includes "mcspi.h" which has now been moved after
the platform_data move.  Fix it.
Signed-off-by: NKevin Hilman <khilman@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This patch adds HWMOD data for all the peripherals of
AM335X device and also hooks up to the existing OMAP framework.

hwmod data has been already been cleaned up for the recent
changes in clocktree, where all leaf nodes have been removed,
since with modulemode based control, both clock and hwmod
interface does same thing. This reduces the code size to large
extent and also avoids duplication of same control.
So instead of specifying module's leaf node as a main_clk,
now we are relying on parent clock of module's functional clock.
Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: NAfzal Mohammed <afzal@ti.com>
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: removed period in hwmod device names; changed mmc2 main_clk
 to mmc_clk at Vaibhav's request; added trailing commas to structure
 records at Tony's request to deal with some rmk parsing issues; added
 OMAP_INTC_START to facilitate sparse-IRQ conversion]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>