- 05 7月, 2008 1 次提交
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由 Sascha Hauer 提交于
This patch introduces the clock API for i.MX and converts all in-Kernel drivers to use it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 05 10月, 2007 1 次提交
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由 Thomas Renninger 提交于
Signed-off-by: NThomas Renninger <trenn@suse.de> Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Bryan Wu <bryan.wu@analog.com> Cc: Andi Kleen <ak@suse.de> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDave Jones <davej@redhat.com>
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- 21 5月, 2007 1 次提交
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由 Simon Arlott 提交于
Spelling fixes in arch/arm/. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 3月, 2007 2 次提交
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由 Pavel Pisa 提交于
Only System PLL clock source is selectable by CSCR_SYSTEM_SEL bit. MPU PLL is driven by 512*CLK32 for each case. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Pavel Pisa 提交于
The minimal bus clock prescaler should be kept at value selected by the board / boot loader designer. Switching frequency above startup limit could lead to the external memory/devices misbehave. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 1月, 2007 1 次提交
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由 Pavel Pisa 提交于
The transition latency has to be defined and reasonably small to allow on-demand and conservative governors. The value has been defined according to manual. The imx_set_target() protected against seen out of range requests now. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 12月, 2006 1 次提交
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由 Pavel Pisa 提交于
Support to change MX1 CPU frequency at runtime. Tested on PiKRON's PiMX1 board and seems to be fully stable up to 200 MHz end even as low as 8 MHz. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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