This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Switch all users of irq_set_chip_and_handler_name() to simply
use irq_set_chip_and_handler(), all just provide a boilerplate
name like "demux" or "mux" - a fact which is anyway obvious
from the hwirq number from the irqdomain now present in e.g.
/proc/interrupts.

Cc: Mathias Nyman <mathias.nyman@linux.intel.com>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: NDavid Cohen <david.a.cohen@linux.intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

In the case offset is 20 ... 23, the equation to get the register should be:
        INTEL_MSIC_GPIO1HV0CTLO - offset + 20

With above equation, we can get below mapping between offset and the register:
        offset is 20: INTEL_MSIC_GPIO1HV0CTLO
        offset is 21: INTEL_MSIC_GPIO1HV1CTLO
        offset is 22: INTEL_MSIC_GPIO1HV2CTLO
        offset is 23: INTEL_MSIC_GPIO1HV3CTLO
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Acked-by: NMathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add gpio support for Intel MSIC chips found in Intel Medfield platforms.
MSIC supports totally 24 GPIOs with 16 low voltage and 8 high voltage pins.
Driver uses MSIC mfd interface for MSIC access.

(Updated comment to indicate why locking is actually safe)
Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>