1. 19 3月, 2007 7 次提交
  2. 15 3月, 2007 2 次提交
  3. 10 3月, 2007 1 次提交
  4. 09 3月, 2007 5 次提交
    • T
      libata: fix ata_host_release() free order · 1aa506e4
      Tejun Heo 提交于
      host->ops->host_stop() might access ports.  Free ports after
      host_stop.
      Signed-off-by: NTejun Heo <htejun@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      1aa506e4
    • R
      sata_nv: revert use of notifiers for now · 8ba5e4cb
      Robert Hancock 提交于
      Commit 721449bf added support for using the
      ADMA notifier bits to determine which commands to check for completion.
      However there have been reports that this causes command timeouts in certain
      cases. This is still being investigated. In addition, apparently the notifiers
      won't work if ADMA is disabled on the other port as a result of an ATAPI device
      being connected, and we don't handle this case properly.
      
      For now, just restore the previous behavior of checking all active commands
      to see if they are complete, without relying on the notifiers.
      Signed-off-by: NRobert Hancock <hancockr@shaw.ca>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      8ba5e4cb
    • P
      Fix simplex adapters with libata · 14d66ab7
      Petr Vandrovec 提交于
      Recently I got my hands on nVidia's MCP61 PM-AM board, and
      it contains IDE chip configured by BIOS with only primary
      channel enabled.  This confuses code which probes for
      device DMA capabilities - it gets 0x60 (happy duplex
      device) from primary channel BMDMA, but 0xFF (nobody here)
      from secondary channel BMDMA.  Due to this code then believes
      that chip is simplex.  I do not address this problem in
      my patch, as I'm not sure how to handle this.  Probably
      ata_pci_init_one should have bitmap of enabled/possible
      interfaces instead of their count, but it looks like
      quite intrusive change, and maybe we do not care - for device
      with only one channel simplex and regular DMA engines are
      same.
      
      But making device simplex pointed out that support for
      DMA on simplex devices is currently broken - ata_dev_xfermask
      tests whether device is simplex and if it is whether DMA
      engine was assigned to this port.  If not then it strips
      out DMA bits from device.  Problem is that code which assigns
      DMA engine to port in ata_set_mode first detect device
      mode and assigns DMA engine to channel only if some DMA
      capable device was found.
      
      And as xfermask stripped out DMA bits, host->simplex_claimed
      is always NULL with current implementation.
      
      By allowing DMA either if simplex_claimed is NULL or if it
      points to current port DMA can be finally used - it gets
      assigned to first port which contains any DMA capable
      device.
      
      Before:
      pata_amd 0000:00:06.0: version 0.2.8
      PCI: Setting latency timer of device 0000:00:06.0 to 64
      ata5: PATA max UDMA/133 cmd 0x000101f0 ctl 0x000103f6 bmdma 0x0001f000 irq 14
      ata6: PATA max UDMA/133 cmd 0x00010170 ctl 0x00010376 bmdma 0x0001f008 irq 15
      scsi4 : pata_amd
      ata5.00: ATAPI, max UDMA/66
      ata5.00: simplex DMA is claimed by other device, disabling DMA
      ata5.00: configured for PIO4
      scsi5 : pata_amd
      ata6: port disabled. ignoring.
      ata6: reset failed, giving up
      scsi 4:0:0:0: CD-ROM            ATAPI    DVD W  DH16W1P   LG12 PQ: 0 ANSI: 5
      
      After:
      pata_amd 0000:00:06.0: version 0.2.8
      PCI: Setting latency timer of device 0000:00:06.0 to 64
      ata5: PATA max UDMA/133 cmd 0x000101f0 ctl 0x000103f6 bmdma 0x0001f000 irq 14
      ata6: PATA max UDMA/133 cmd 0x00010170 ctl 0x00010376 bmdma 0x0001f008 irq 15
      scsi4 : pata_amd
      ata5.00: ATAPI, max UDMA/66
      ata5.00: configured for UDMA/33
      scsi5 : pata_amd
      ata6: port disabled. ignoring.
      ata6: reset failed, giving up
      scsi 4:0:0:0: CD-ROM            ATAPI    DVD W  DH16W1P   LG12 PQ: 0 ANSI: 5
      Signed-off-by: NPetr Vandrovec <petr@vandrovec.name>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      14d66ab7
    • A
      ata_piix: Remove ugly layering violation · 9a2eb709
      Alan Cox 提交于
      A while ago I modified the libata code so that drivers can return -ENOENT
      for unknown ports not fiddle with the EH flags and print stuff directly.
      Somewhere along the line ata_piix didn't get fully converted.
      Signed-off-by: NAlan Cox <alan@redhat.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      9a2eb709
    • A
      [PATCH] libata-acpi: Try and stop all the non PCI devices crashing · ca426635
      Alan Cox 提交于
      For 2.6.20 it mostly used to just not work, for 2.6.21-rc it crashes, this
      seems to be down to luck (bad or good). The libata-acpi code needs to
      avoid doing PCI work on non-PCI devices. This is one hack although it's
      not pretty and perhaps there is a "right" way to check if a struct device
      * is PCI ?
      Signed-off-by: NAlan Cox <alan@redhat.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      ca426635
  5. 06 3月, 2007 3 次提交
    • B
      pata_pdc202xx_old: fix data corruption and other problems · 63ed7101
      Bartlomiej Zolnierkiewicz 提交于
      Fix wrong "port" calculations in pdc202xx_{configure_piomode,set_dmamode}()
      They were broken for all configurations except one (master device on primary
      channel, no other devices) and as a result device settings + PIO/DMA timings
      were being programmed into the wrong PCI registers.  This could result in
      a large variety of problems including data corruption, hangs etc. (depending
      on devices used and your luck :-).
      
        ap->port_no   ap->devno   used PCI registers   correct PCI registers
                  0           0            0x60-0x62               0x60-0x62
                  0           1            0x62-0x64               0x64-0x66
                  1           0            0x64-0x66               0x68-0x6a
                  1           1            0x66-0x68               0x6c-0x6e
      
      Also forward port recent fixes from drivers/ide pdc202xx_old driver:
      
      * fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)
      
      * fix bitmasks for clearing bits of register B:
      
        - when programming DMA mode bit 0x10 of register B was cleared which
          resulted in overclocked PIO timing setting (iff PIO0 was used)
      
        - when programming PIO mode bits 0x18 weren't cleared so suboptimal
          timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
          and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)
      
      and finally bump driver version.
      Signed-off-by: NBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      63ed7101
    • M
      pata_legacy: fix io/irq mismatch · 8b966ddd
      Mikael Pettersson 提交于
      pata_legacy fails to detect the disk on my old ISA/VLB 486:
      it starts to probe io=0x1f0 ctr=0x3f6 irq=15, complains
      loudly about IDENTIFYs timing out, and finally fails.
      (Sorry I couldn't capture the kernel's boot messages.)
      
      It turns out that the driver's mapping from io to irq in
      legacy_irq[] is wrong: index 0 for io=0x1f0 has irq=15 but
      should have irq=14, and index 1 for io=0x170 has irq=14 but
      should have irq=15. This is confirmed by a comparison with
      include/asm-i386/ide.h:ide_default_irq().
      
      This patch swaps the first two elements in legacy_irq[],
      which makes pata_legacy work on my 486.
      Signed-off-by: NMikael Pettersson <mikpe@it.uu.se>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      8b966ddd
    • J
      ahci: RAID mode SATA patch for Intel ICH9M · 8af12cdb
      Jason Gaston 提交于
      This patch adds the Intel ICH9M RAID controller DID for SATA support.
      Signed-off-by: NJason Gaston <jason.d.gaston@intel.com>
      Signed-off-by: NJeff Garzik <jeff@garzik.org>
      8af12cdb
  6. 03 3月, 2007 9 次提交
  7. 02 3月, 2007 6 次提交
  8. 27 2月, 2007 1 次提交
  9. 26 2月, 2007 6 次提交