- 09 2月, 2013 5 次提交
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由 Alexandre Courbot 提交于
Re-implement gpiochip_find_base using the list of chips instead of the global gpio_desc[] array. This makes it both simpler and more efficient, and is needed to remove the global descriptors array. The new code should preserve the exact same GPIO number assignment policy as the code it is replacing. There shouldn't be any visible change to the assigned GPIO numbers. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> [grant.likely: Added comment about assignment policy] Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Alexandre Courbot 提交于
This makes the code both simpler and faster compared to parsing the GPIO number space. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Alexandre Courbot 提交于
Using the GPIO chips list is much faster than parsing the entire GPIO number space. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Alexandre Courbot 提交于
Use the small list of GPIO chips instead of parsing the whole GPIO number space. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Alexandre Courbot 提交于
Add a list member to gpio_chip that allows all chips to be parsed quickly. The current method requires parsing the entire GPIO integer space, which is painfully slow. Using a list makes many chip operations that involve lookup or parsing faster, and also simplifies the code. It is also necessary to eventually get rid of the global gpio_desc[] array. The list of gpio_chips is always ordered by base GPIO number to ensure chips traversal is done in the right order. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 05 2月, 2013 7 次提交
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由 David Cohen 提交于
This patch cleans up cosmetic issues, remove useless functions and add to_lnw_priv() macro to replace many usages of container_of(). Signed-off-by: NDavid Cohen <david.a.cohen@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 David Cohen 提交于
Adds support for new Cloverview hardware. Signed-off-by: NDavid Cohen <david.a.cohen@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Mathias Nyman 提交于
Add gpio support for Intel Lynxpoint chipset. Lynxpoint supports 94 gpio pins which can generate interrupts. Driver will fail requests for pins that are marked as owned by ACPI, or set in an alternate mode (non-gpio). Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Alexandre Courbot 提交于
Add missing braces in an if..else condition. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mathias Nyman 提交于
Print error message if requesting an interrupt fails. Use int instead of unsigned for interrupts in case of error values Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Anatolij Gustschin 提交于
Exporting gpios over sysfs GPIO interface throws genirq error messages, i.e. on an mpc5121 based board exporting GPIO 5 triggers it: # echo 229 > /sys/class/gpio/export genirq: Setting trigger mode 0 for irq 44 failed (mpc512x_irq_set_type+0x0/0x18c) Similar error messages appear in the kernel boot log since the board specifies GPIOs for matrix keypad and also SD Card write protect and card detect GPIOs in its device tree. For all these GPIOs there is an error message in the log. The issue is triggered by setting the irq type to IRQ_TYPE_NONE in the driver's irq_domain map function mpc8xxx_gpio_irq_map(). ... mpc8xxx_gpio_irq_map irq_set_irq_type __irq_set_trigger __irq_set_trigger() calls irq_set_type() callback of the mpc8xxx gpio irq chip with the IRQ_TYPE_NONE in its 'flags' argument. This callback is either mpc8xxx_irq_set_type() or mpc512x_irq_set_type(). Both these functions return -EINVAL in the case if IRQ_TYPE_NONE is passed in the flow_type argument. This return value triggers the observed error message in __irq_set_trigger(). Modifying these callbacks to not return an error in IRQ_TYPE_NONE case doesn't make any sense to me. The line setting IRQ_TYPE_NONE type has been originally added by commit 345e5c8a "powerpc: Add interrupt support to mpc8xxx_gpio". At this time set_irq_type() checked its type argument and returned 0 if the type argument didn't specify any meaningful type in its type sense bits (and thus was equal to IRQ_TYPE_NONE). Effectively this line was a nop and I wonder what was the point of adding it. Remove IRQ_TYPE_NONE setting in the irq_domain mapping function. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> -
由 Alexandre Courbot 提交于
gpiochip_reserve() has no user and stands in the way of the removal of the static gpio_desc[] array. Remove this function as well as the now unneeded RESERVED flag of struct gpio_desc. Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 1月, 2013 2 次提交
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由 Gwenhael Goavec-Merou 提交于
This patch adds support for IRQ_TYPE_EDGE_BOTH needed for some driver (gpio-keys). Inspired from gpio-mxc.c Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mathias Nyman 提交于
Add ability to handle ACPI events signalled by GPIO interrupts. ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are handled by ACPI event methods which need to be called from the GPIO controller's interrupt handler. acpi_gpio_request_interrupt() finds out which gpio pins have acpi event methods and assigns interrupt handlers that calls the acpi event methods for those pins. Partially based on work by Rui Zhang <rui.zhang@intel.com> Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 1月, 2013 2 次提交
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由 Linus Walleij 提交于
Using the devm_* managed resources the pca driver can be simplified and cut down on boilerplate code. [gcl: fixed a inccorect reference to a removed label, "goto fail_out" became "return ret"] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Gregory CLEMENT 提交于
This switches the legacy irqdomain to the simple one, which will auto-allocate descriptors, and also make sure that we use irq_create_mapping() in the to_irq function. Also use the map function of irq_domain_ops to setup the irq configuration on demand and no more statically during the initialization of the driver. Based on a initial patch from Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 1月, 2013 3 次提交
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由 Haojian Zhuang 提交于
gpio & pinctrl driver are used together. The pinctrl driver is already launched before gpio driver in Makefile. So set gpio driver to module init level. Otherwise, the sequence will be inverted. Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Gregory CLEMENT 提交于
Now that pca953x driver can handle GPIO expanders with more than 32 bits this patch adds the support for the pca9505 which cam with 40 GPIOs. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Gregory CLEMENT 提交于
Until now the pca953x driver accessed all the bank of a given register in a single command using only a 32 bits variable. New expanders from the pca53x family come with 40 GPIOs which no more fit in a 32 variable. This patch make access to the registers more generic by relying on an array of u8 variables. This fits exactly the way the registers are represented in the hardware. It also adds helpers to access to a single register of a bank instead of reading or writing all the banks for a given register. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 22 1月, 2013 2 次提交
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由 Haojian Zhuang 提交于
Replace subsys initcall by module initcall level. Since pinctrl driver is already launched before gpio driver. It's unnecessary to set gpio driver in subsys init call level. Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org> Tested-by: NDinh Nguyen <dinguyen@altera.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Shawn Guo 提交于
Some architectures (e.g. blackfin) provide gpio API without requiring GPIOLIB support (ARCH_WANT_OPTIONAL_GPIOLIB). devm_gpio_* functions should also work for these architectures, since they do not really depend on GPIOLIB. Add a new option GPIO_DEVRES (enabled by default) to control the build of devres.c. It also removes the empty version of devm_gpio_* functions for !GENERIC_GPIO build from linux/gpio.h, and moves the function declarations from asm-generic/gpio.h into linux/gpio.h. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 1月, 2013 6 次提交
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由 Thierry Reding 提交于
The gpio_chip.label field is a const char * and assigned the value of a call to dev_name(). Memory obtained from dev_name() should not be freed by drivers. Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kukjin Kim 提交于
Since exynos5440 can support pinctrl so skip the legacy gpiolib registration. If not, happens following. WARNING: at drivers/gpio/gpio-samsung.c:3102 samsung_gpiolib_init+0x68/0x8c() Unknown SoC in gpio-samsung, no GPIOs added Acked-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Peter Ujfalusi 提交于
Use more coherent locking in the driver. Use bitfield to store the GPIO direction and if the pin is configured as output store the status also in a bitfiled. In this way we can just look at these bitfields when we need information about the pin status and only reach out to the chip when it is needed. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Peter Ujfalusi 提交于
Move most of the global variables inside a private structure and allocate it dynamically. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kukjin Kim 提交于
This patch fixes following warning: drivers/gpio/gpio-samsung.c:450:32: warning: 'exynos_gpio_cfg' defined but not used [-Wunused-variable] drivers/gpio/gpio-samsung.c:2450:33: warning: 'exynos5_gpios_1' defined but not used [-Wunused-variable] drivers/gpio/gpio-samsung.c:2618:33: warning: 'exynos5_gpios_2' defined but not used [-Wunused-variable] drivers/gpio/gpio-samsung.c:2679:33: warning: 'exynos5_gpios_3' defined but not used [-Wunused-variable] drivers/gpio/gpio-samsung.c:2715:33: warning: 'exynos5_gpios_4' defined but not used [-Wunused-variable] Because current gpio-samsung is valid only on EXYNOS5250. Cc: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Kukjin Kim 提交于
Since EXYNOS5440 can select PINCTRL_EXYNOS5440 without PINCTRL_SAMSUNG, it should be fixed. In detail, PINCTRL_SAMSUNG is a kind of frame work for supporting pinctrl on most Samsung SoCs including S3C, S5P as well except EXYNOS5440 so PINCTRL_EXYNOS5440 has been implemented separated. Cc: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 1月, 2013 2 次提交
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由 Kukjin Kim 提交于
The <mach/regs-clock.h> is not needed for gpio-samsung. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tony Prisk 提交于
The vendor does not provide numbering for gpio pins. Vendor source exports dedicated gpio pins first, followed by multifunction pins. As this is what end users expect, this patch changes vt8500 and wm8505 to do the same. Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 1月, 2013 1 次提交
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由 Greg Kroah-Hartman 提交于
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 20 12月, 2012 2 次提交
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由 Gregory CLEMENT 提交于
When building without device tree support (for the mv78x00 SoCs for example), the build failed because of_irq_count is undeclared. However mvebu-gpio is not designed to build without device tree support. So make it depends on OF_CONFIG, remove the #ifdef OF_CONFIG line and the platform_device_id. Tested on RD-78x00-mASA, DB-78460-BP, DB-88F6710-BP-DDR3, DB-MV784MP-GP, Mirabox and OpenBlocks AX3. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Jean Delvare 提交于
As reported by CONFIG_DEBUG_SPINLOCK=y. Signed-off-by: NJean Delvare <khali@linux-fr.org> Acked-by: NPeter Tyser <ptyser@xes-inc.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 10 12月, 2012 2 次提交
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由 Lee Jones 提交于
The STMPE GPIO driver can be used as an IRQ controller by some related devices. Here we provide it with its very own IRQ Domain so that IRQs can be issued dynamically. This will stand the driver in good stead when it is enabled for Device Tree, as this it a prerequisite. Cc: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Vivien Didelot 提交于
Technologic Systems TS-5500 provides digital I/O lines exposed through pin blocks. On this platform, there are three of them, named DIO1, DIO2 and LCD port, that may be used as a DIO block. The TS-5500 pin blocks are described in the product's wiki: http://wiki.embeddedarm.com/wiki/TS-5500#Digital_I.2FO This driver is not limited to the TS-5500 blocks. It can be extended to support similar boards pin blocks, such as on the TS-5600. This patch is the V2 of the previous https://lkml.org/lkml/2012/9/25/671 with corrections suggested by Linus Walleij. Signed-off-by: NVivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: NJerome Oufella <jerome.oufella@savoirfairelinux.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 07 12月, 2012 1 次提交
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由 Kuninori Morimoto 提交于
6e20a0a4 (gpio: pcf857x: enable gpio_to_irq() support) added gpio_to_irq() support on pcf857x driver, but it used pdata->irq. This patch modifies driver to use client->irq instead of it. It modifies kzm9g board platform settings, and device probe information too. This patch is tested on kzm9g board Reported-by: NChristian Engelmayer <christian.engelmayer@frequentis.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 12月, 2012 1 次提交
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由 Masanari Iida 提交于
Correct spelling typo within various Kconfig. Signed-off-by: NMasanari Iida <standby24x7@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 02 12月, 2012 1 次提交
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由 Vipul Kumar Samar 提交于
This patch allows the STMPE GPIO driver to be successfully probed and initialised when Device Tree support is enabled. Bindings are mentioned in Documentation too. Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 01 12月, 2012 1 次提交
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由 Alessandro Rubini 提交于
Commit dece904d (gpio: pl061: use chained_irq_* functions in irq handler) introduced chained_irq_enter/exit, which is only available for arch/arm and the driver won't compile elsewhere. The dependency is thus made explicit, because AMBA is used in the x86 world by a PCI-to-AMBA bridge, to be submitted. Signed-off-by: NAlessandro Rubini <rubini@gnudd.com> Acked-by: NGiancarlo Asnaghi <giancarlo.asnaghi@st.com> Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 11月, 2012 2 次提交
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由 Mathias Nyman 提交于
Add support for translating ACPI GPIO pin numbers to Linux GPIO API pins. Needs a gpio controller driver with the acpi handler hook set. Drivers can use acpi_get_gpio() to translate ACPI5 GpioIO and GpioInt resources to Linux GPIO's. Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Baruch Siach 提交于
Since 3ab52475 (gpio: pl061: convert to use generic irq chip) we only have one spinlock in struct pl061_gpio. Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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