1. 09 2月, 2008 1 次提交
  2. 18 10月, 2007 1 次提交
  3. 14 10月, 2007 1 次提交
  4. 21 7月, 2007 1 次提交
  5. 20 7月, 2007 3 次提交
  6. 08 6月, 2007 1 次提交
    • D
      [SPARC64]: Handle PCI bridges without 'ranges' property. · 8c2786cf
      David S. Miller 提交于
      This fixes the IDE controller not showing up on Netra-T1
      systems.
      
      Just like Simba bridges, some PCI bridges can lack the
      'ranges' OBP property.  So we handle this similarly to
      the existing Simba code:
      
      1) In of_device register address resolving, we push the
         translation to the parent.
      
      2) In PCI device scanning, we interrogate the PCI config
         space registers of the PCI bus device in order to resolve
         the resources, just like the generic Linux PCI probing
         code does.
      
      With much help and testing from Fabio, who also reported
      the initial problem.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NFabio Massimo Di Nitto <fabbione@ubuntu.com>
      8c2786cf
  7. 14 5月, 2007 1 次提交
  8. 12 5月, 2007 1 次提交
  9. 26 4月, 2007 4 次提交
  10. 03 3月, 2007 2 次提交
  11. 28 2月, 2007 1 次提交
  12. 01 1月, 2007 1 次提交
  13. 10 12月, 2006 1 次提交
  14. 27 10月, 2006 1 次提交
  15. 26 10月, 2006 1 次提交
    • D
      [SPARC64]: Fix central/FHC bus handling on Ex000 systems. · 4130a4b2
      David S. Miller 提交于
      1) probe_other_fhcs() wants to see only non-central FHC
         busses, so skip FHCs that don't sit off the root
      
      2) Like SBUS, FHC can lack the appropriate address and
         size cell count properties, so add an of_busses[]
         entry and handlers for that.
      
      3) Central FHC irq translator probing was buggy.  We
         were trying to use dp->child in irq_trans_init but
         that linkage is not setup at this point.
      
         So instead, pass in the parent of "dp" and look for
         the child "fhc" with parent "central".
      
      Thanks to the tireless assistence of Ben Collins in tracking
      down these problems and testing out these fixes.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4130a4b2
  16. 20 10月, 2006 1 次提交
  17. 10 10月, 2006 1 次提交
  18. 04 10月, 2006 1 次提交
  19. 22 7月, 2006 1 次提交
    • D
      [SPARC64]: Fix more of_device layer IRQ bugs, and correct PROMREG_MAX. · 46ba6d7d
      David S. Miller 提交于
      Sabre and Psycho PCI controllers can have partial interrupt-map
      properties, meaning that on-board devices don't match up to any
      entries.  Instead, they are fully specified from the beginning and
      we should pass them directly to the IRQ translator as-is.
      
      Also, fill in the necessary translator slots for the "graphics"
      and "expansion UPA" interrupts on Sabre, Psycho, and SYSIO SBUS.
      
      Increase PROMREG_MAX to 24, as seen on SUNW,ffb devices.
      
      Finally, prevent accidentally writing past the end of the of_device
      struct resource[] and irqs[] arrays.  Spit out a log message when
      we ignore some entries because there are too many of them.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      46ba6d7d
  20. 13 7月, 2006 2 次提交
    • D
      [SPARC]: Fix OF register translations under sub-PCI busses. · a83f9823
      David S. Miller 提交于
      There is an implicit assumption in the code that ranges will translate
      to something that can fit in 2 32-bit cells, or a 64-bit value.  For
      certain kinds of things below PCI this isn't necessarily true.
      
      Here is what the relevant OF device hierarchy looks like for one of
      the serial controllers on an Ultra5:
      
          Node 0xf005f1e0
              ranges:      00000000.00000000.00000000.000001fe.01000000.00000000.01000000
                           01000000.00000000.00000000.000001fe.02000000.00000000.01000000
                           02000000.00000000.00000000.000001ff.00000000.00000001.00000000
                           03000000.00000000.00000000.000001ff.00000000.00000001.00000000
              device_type:  'pci'
              model:  'SUNW,sabre'
      
              Node 0xf005f9d4
                  device_type:  'pci'
                  model:  'SUNW,simba'
      
                 Node 0xf0060d24
                      ranges:  00000010.00000000 82010810.00000000.f0000000 01000000
      			 00000014.00000000 82010814.00000000.f1000000 00800000
                      name:  'ebus'
      
                      Node 0xf0062dac
                          reg:  00000014.003083f8.00000008 --> 0x1ff.f13083f8
                          device_type:  'serial'
                          name:  'su'
      
      So the correct translation here is:
      
      1) Match "su" register to second ranges entry of 'ebus', which translates
         into a PCI triplet "82010814.00000000.f1000000" of size 00800000, which
         gives us "82010814.00000000.f13083f8".
      
      2) Pass-through "SUNW,simba" since it lacks ranges property
      
      3) Match "82010814.00000000.f13083f8" to third ranges property of PCI
         controller node 'SUNW,sabre', and we arrive at the final physical
         MMIO address of "0x1fff13083f8".
      
      Due to the 2-cell assumption, we couldn't translate to a PCI 3-cell
      value, and we couldn't perform a pass-thru on it either.
      
      It was easiest to just stop splitting the ranges application operation
      between two methods, ->map and ->translate, and just let ->map do all
      the work.  That way it would work purely on 32-bit cell arrays instead
      of having to "return" some value like a u64.
      
      It's still not %100 correct because the out-of-range check is still
      done using the 64 least significant bits of the range and address.
      But it does work for all the cases I've thrown at it so far.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a83f9823
    • A
      [SPARC64]: of_device_register() error checking fix · 6cc8b6f5
      Andrew Morton 提交于
      device_create_file() can fail.  This causes the sparc64 compile to
      fail when my fanatical __must_check patch is applied, due to -Werror.
      
      [ Added necessary identical fix for sparc32. -DaveM]
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6cc8b6f5
  21. 01 7月, 2006 1 次提交
  22. 30 6月, 2006 3 次提交
  23. 26 6月, 2006 1 次提交
  24. 24 6月, 2006 1 次提交
  25. 23 3月, 2006 1 次提交
  26. 14 1月, 2006 1 次提交
  27. 31 10月, 2005 1 次提交
  28. 06 10月, 2005 1 次提交
  29. 23 9月, 2005 1 次提交
    • B
      [PATCH] ppc64: SMU driver update & i2c support · 0365ba7f
      Benjamin Herrenschmidt 提交于
      The SMU is the "system controller" chip used by Apple recent G5 machines
      including the iMac G5.  It drives things like fans, i2c busses, real time
      clock, etc...
      
      The current kernel contains a very crude driver that doesn't do much more
      than reading the real time clock synchronously.  This is a completely
      rewritten driver that provides interrupt based command queuing, a userland
      interface, and an i2c/smbus driver for accessing the devices hanging off
      the SMU i2c busses like temperature sensors.  This driver is a basic block
      for upcoming work on thermal control for those machines, among others.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Jean Delvare <khali@linux-fr.org>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      0365ba7f
  30. 30 8月, 2005 1 次提交
  31. 07 7月, 2005 1 次提交