Pull blackfin changes from Bob Liu:
 "The big changes are adding PM and HDMI support for bf60x, other
  patches are various bug fix and code cleanup."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin: (48 commits)
  bf60x: fix build warning
  PM: add BF60x flash suspend and resume support
  blackfin: twi: read twi mmr via bfin_read macro
  dpm: deepsleep: reserve stack
  bf60x: cpufreq: fix anomaly 05000273
  bf609: add adv7511 display support
  blackfin: cplb-nompu: fix ROM cplb size for bf609-ezkit
  bf60x: Add double fault, hardware error and NMI SEC handler
  bf60x: update anomaly id in serial and twi driver headers.
  bf60x: vs6624 pin update
  bf60x: add default anomaly setting.
  bf60x: update bf60x anomaly list.
  bf60x: sec: Enable sec interrupt source priority configuration.
  bf60x: sec: Clean up interrupt initialization code for SEC.
  bf609: reuse bf5xx-i2s-pcm.c as i2s pcm driver
  bf561: add capabilities in adv7183_inputs
  bf609: convert vs6624 blank_clocks to black_pixels
  blackfin: fix musb macro name
  cleanup: sec and linkport only built on bf60x
  bfin: pint: add pint suspend and resume
  ...

Pull C6X changes from Mark Salter:

  - remove use of legacy irqs which really wasn't needed
  - add support for C66x SoC on EVMC6678 board
  - clean up compiler warning

* tag 'for-linus' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming:
  C6X: clean up compiler warning
  C6X: add basic support for TMS320C6678 SoC
  C6X: remove dependence on legacy IRQs
  C6X: remove megamod-pic requirement on direct-mapped core pic

Fix several build warning while using bf609-ezkit_defconfig.
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Reserve 12 bytes on the stack for deepsleep use.
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Anomaly 05000273 doesn't apply to bf60x.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

In user xip test, there is a cplb error when ROMKERNEL try to mount romfs
using 'mount -t romfs /dev/mtdblock2 /mnt', becasue the CPLB setting is not
correct.
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Change ce pin to PE4 according to new adaptor board and re-define ppi for vs6624
to avoid gpio conflict.
Signed-off-by: NVivi Li <vivi.li@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Customize the SEC interrupt priority array in machine ints-priority.c.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Turn SEC related macro CONFIG_BF60x into SEC_GCTL.
Move machine specific GPIO_PINT macros to machine gpio header.
Split SEC init_arch_irq() and vec_to_irq() from old SIC.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

It's the same for both bf5xx and bf6xx soc.
Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Add capabilities in adv7183_inputs to indicate that S_STD is supported.
Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

PPI driver has changed blank units from clocks to pixels.
Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Musb can't work since the marco name has been changed.
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Add pint suspend and resume if defined BFIN_GPIO_PINT.
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

save and restore pint sec CTL
save and restore pint registers
add pint suspend and resume when suspend to mem
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Pass wake up source mask and wakeup source polarity to deepsleep and
hibernate.
Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Set .probe_type = "map_rom" for norflash so that xip_test can run
correctly.
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Otherwise, the compiler may optimize assemble code into 8bit access instruction
when target register is 8 bit width.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Add irq_set_wake to bfin_sec_irqchip, drivers like stmmac need it.
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Add add deepsleep for bf60x.
1. Call DMC init functions to enter and exit DDR self refresh mode.
2. Wait till CGU PLL is locked after wake up and exit DDR self refresh mode.
3. Make asessembly function enter_deepsleep comply with C funtion ABI in
order to call other C functions.
4. Switch kernel stack by register EX_SCRATCH_REG.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

Signed-off-by: NSteven Miao <realmz6@gmail.com>
Signed-off-by: NBob Liu <lliubbo@gmail.com>

ROM range of bf60x is above 0xb0000000.
Signed-off-by: NBob Liu <lliubbo@gmail.com>