1. 09 4月, 2009 1 次提交
  2. 08 4月, 2009 2 次提交
    • P
      perf_counter: powerpc: set sample enable bit for marked instruction events · f708223d
      Paul Mackerras 提交于
      Impact: enable access to hardware feature
      
      POWER processors have the ability to "mark" a subset of the instructions
      and provide more detailed information on what happens to the marked
      instructions as they flow through the pipeline.  This marking is
      enabled by the "sample enable" bit in MMCRA, and there are
      synchronization requirements around setting and clearing the bit.
      
      This adds logic to the processor-specific back-ends so that they know
      which events relate to marked instructions and set the sampling enable
      bit if any event that we want to put on the PMU is a marked instruction
      event.  It also adds logic to the generic powerpc code to do the
      necessary synchronization if that bit is set.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      LKML-Reference: <18908.31930.1024.228867@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f708223d
    • P
      perf_counter: fix powerpc build · dc66270b
      Paul Mackerras 提交于
      Commit 4af4998b ("perf_counter: rework context time") changed struct
      perf_counter_context to have a 'time' field instead of a 'time_now'
      field, but neglected to fix the place in the powerpc perf_counter.c
      where the time_now field was accessed.  This fixes it.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      LKML-Reference: <18908.31922.411398.147810@cargo.ozlabs.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      dc66270b
  3. 07 4月, 2009 37 次提交