- 03 5月, 2013 2 次提交
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由 Russell King 提交于
Consistently check errors using the usual method used in the kernel for much of its history. For instance: int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) { int div; div = gpmc_calc_divider(t->sync_clk); if (div < 0) return div; static int gpmc_set_async_mode(int cs, struct gpmc_timings *t) { ... return gpmc_cs_set_timings(cs, t); ..... ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t); if (IS_ERR_VALUE(ret)) return ret; So, gpmc_cs_set_timings() thinks any negative return value is an error, but where we check that in higher levels, only a limited range are errors... There is only _one_ use of IS_ERR_VALUE() in arch/arm which is really appropriate, and that is in arch/arm/include/asm/syscall.h: static inline long syscall_get_error(struct task_struct *task, struct pt_regs *regs) { unsigned long error = regs->ARM_r0; return IS_ERR_VALUE(error) ? error : 0; } because this function really does have to differentiate between error return values and addresses which look like negative numbers (eg, from mmap()). So, here's a patch to remove them from OMAP, except for the above. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
omap_hwmod_lookup() only returns NULL on error, never an error pointer. Checking the returned pointer using IS_ERR_OR_NULL() is needless overhead. Use a simple !ptr check instead. OMAP devices (oh->od) always have a valid platform device attached (see omap_device_alloc()) so there's no point validating the platform device pointer (we will have already oopsed long before if this is not the case here.) Lastly, oh->od is only ever NULL or a valid omap device pointer - 'oh' comes from the statically declared hwmod tables, and the pointer is only filled in by omap_device_alloc() at a point where the omap device pointer must be valid. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 4月, 2013 1 次提交
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由 Arnd Bergmann 提交于
CONFIG_ARCH_OMAP2PLUS depends on (ARCH_MULTI_V6 || ARCH_MULTI_V7) as of a0694861 "ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support", but the individual OMAP2/3/4/5 and AM33XX platforms can all be selected independent of what we are building for, which is a bug and prevents us from easily building e.g. an ARMv7-only defconfig. This makes ARCH_OMAP2 depend on ARCH_MULTI_V6 and the others depend on ARCH_MULTI_V7, to ensure we really only build the platforms for the CPUs we have enabled in the global multiplatform configuration step. Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 23 4月, 2013 3 次提交
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由 Daniel Lezcano 提交于
Remove the duplicated code and use the cpuidle common code for initialization. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Daniel Lezcano 提交于
Remove the duplicated code and use the cpuidle common code for initialization. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Daniel Lezcano 提交于
The en_core_tk_irqen flag is set in all the cpuidle driver which means it is not necessary to specify this flag. Remove the flag and the code related to it. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> # for mach-omap2/* Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 22 4月, 2013 1 次提交
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由 Daniel Lezcano 提交于
In a previous commit the en_core_tk_irqen flag has been added but we missed the cpuidle_wrap_enter which was doing the job to measure the time for the 'omap3_enter_idle' function. Actually, I don't see any reason to use this wrapper in the code. In the better case, the time computation is not correctly done because of the different operations done in omap3_enter_idle_bm which were not taken into account before the en_core_tk_irqen flag was set. As the time is reflected for the state overridden by the omap3_enter_idle_bm, using the wrapper is pointless now, so removing it. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NKevin Hilman <khilman@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 19 4月, 2013 1 次提交
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由 Russell King 提交于
Remove the majority of cache flushing calls from the individual platform files. This is now handled by the core code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 4月, 2013 1 次提交
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由 Kishon Vijay Abraham I 提交于
Commit 92702df3 ("ARM: OMAP4: PM: fix PM regression introduced by recent clock cleanup") makes the 'ocp2scp_usb_phy_phy_48m' as optional functional clock causing regression in MUSB. But this 48MHz clock is a mandatory clock for usb phy attached to ocp2scp and hence made as the main clock for ocp2scp. Cc: Keerthy <j-keerthy@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> [paul@pwsan.com: add comment to the hwmod data to try to prevent any future mistakes here] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 4月, 2013 8 次提交
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由 Nishanth Menon 提交于
As multi-platform build is being adopted by more and more ARM platforms, initcall function should be used very carefully. For example, when CONFIG_ARM_OMAP2PLUS_CPUFREQ is built in the kernel, omap_cpufreq_init() will be called on all the platforms to initialize omap-cpufreq driver. Further, on OMAP, we now use Soc generic cpufreq-cpu0 driver using device tree entries. To allow cpufreq-cpu0 and omap-cpufreq drivers to co-exist for OMAP in a single image, we need to ensure the following: 1. With device tree boot, we use cpufreq-cpu0 2. With non device tree boot, we use omap-cpufreq In the case of (1), we will have cpu OPPs and regulator registered as part of the device tree nodes, to ensure that omap-cpufreq and cpufreq-cpu0 don't conflict in managing the frequency of the same CPU, we should not permit omap-cpufreq to be probed. In the case of (2), we will not have the cpufreq-cpu0 device, hence only omap-cpufreq will be active. To eliminate this undesired these effects, we change omap-cpufreq driver to have it instantiated as a platform_driver and register "omap-cpufreq" device only when booted without device tree nodes on OMAP platforms. This allows the following: a) Will only run on platforms that create the platform_device "omap-cpufreq". b) Since the platform_device is registered only when device tree nodes are *not* populated, omap-cpufreq driver does not conflict with the usage of cpufreq-cpu0 driver which is used on OMAP platforms when device tree nodes are present. Inspired by commit 5553f9e2 (cpufreq: instantiate cpufreq-cpu0 as a platform_driver) [robherring2@gmail.com: reported conflict of omap-cpufreq vs other driver in an non-device tree supported boot] Reported-by: NRob Herring <robherring2@gmail.com> Signed-off-by: NNishanth Menon <nm@ti.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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由 Stephen Boyd 提交于
The TWD and SCU configs are selected by default as long as MSM_SCORPIONMP is false and/or MCT is false. Implementing the logic this way certainly saves lines in the Kconfig but it precludes those machines which select MSM_SCORPIONMP or MCT from participating in the single zImage effort because when those machines are combined with other SMP capable machines the TWD and SCU are no longer selected by default. Push the select out to the machine entries so that we can compile these machines together and still select the appropriate configs. Cc: Barry Song <baohua.song@csr.com> Acked-by: NDavid Brown <davidb@codeaurora.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NPawel Moll <pawel.moll@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NSimon Horman <horms@verge.net.au> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tony Lindgren <tony@atomide.com> Acked-by: NViresh Kumar <viresh.linux@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Santosh Shilimkar 提交于
The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver implementation. Also the next derivative SOCs are going to re-use the MPUSS so, same driver with minor updates can be re-used. Prepare the code so that its easier to add CPUidle support for OMAP5 devices. Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Santosh Shilimkar 提交于
Current OMAP4 CPUIdle driver is using omap4_mpuss_read_prev_context_state() to check whether the MPU cluster lost context or not before calling cpu_cluster_pm_exit(). This was initially done an optimization for corner cases, where if the cluster low power entry fails for some reason, the cluster context restore gets skipped. However, since reading the previous context is expensive (involving slow accesses to the PRCM), it's better to avoid it and simply check the target cluster state instead. Moving forward, OMAP CPUidle drivers needs to be moved to drivers/idle/* once the PRM/CM code gets moved to drivers. This patch also reduces one dependency with platform code for idle driver movement. Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> [khilman@linaro.org: minor changelog edits] Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Santosh Shilimkar 提交于
It is useful to know the CPU power state along with MPUSS power state in a supported C-state. Since the data is available via sysfs, one can avoid scrolling the source code for precise construction of C-state. Reported-by: NNishanth Menon <nm@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Santosh Shilimkar 提交于
If the CPUidle device registration fails for some reason, we should unregister the driver on error path. Fix the code accordingly. Also when at it, check of the driver registration failure too. Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Santosh Shilimkar 提交于
OMAP4 CPUidle driver registration call is under a loop which leads to calling cpuidle_register_driver twice which is not intended. Fix it by moving the driver registration outside the loop. Reported-by: NNishanth Menon <nm@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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由 Daniel Lezcano 提交于
The TIME_VALID flag is specified for the different states but the time residency computation is not done, no tk flag, no time computation in the idle function. Set the en_core_tk_irqen flag to activate it. Cc: stable@vger.kernel.org Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 09 4月, 2013 5 次提交
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由 Sricharan R 提交于
This enables the fixes for the below erratas applicable for OMAP4 Socs. 754322: Faulty MMU translations following ASID switch 775420: A data cache maintenance operation which aborts, followed by an ISB, without any DSB in-between, might lead to deadlock Signed-off-by: NSricharan R <r.sricharan@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ruslan Bilovol 提交于
In some situations it is useful for userspace to know some SoC-specific information. For example, this may be used for deciding what kernel module to use or how to better configure some settings etc. This patch exports OMAP SoC information to userspace using existing in Linux kernel SoC infrastructure. This information can be read under /sys/devices/socX directory Signed-off-by: NRuslan Bilovol <ruslan.bilovol@ti.com> [tony@atomide.com: updated for multiplatform changes] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ruslan Bilovol 提交于
This is a long story where for each new generation of OMAP we used different approaches for creating strings for SoCs names and revisions that this patch fixes. It makes future exporting of this information to SoC infrastructure easier. Signed-off-by: NRuslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ruslan Bilovol 提交于
Signed-off-by: NRuslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Daniel Lezcano 提交于
The TIME_VALID flag is specified for the different states but the time residency computation is not done, no tk flag, no time computation in the idle function. Set the en_core_tk_irqen flag to activate it. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 08 4月, 2013 1 次提交
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由 Thomas Gleixner 提交于
Use the generic idle loop and replace enable/disable_hlt with the respective core functions. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Reviewed-by: NCc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP Link: http://lkml.kernel.org/r/20130321215233.826238797@linutronix.de
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- 06 4月, 2013 1 次提交
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由 Santosh Shilimkar 提交于
While waking up CPU from off state using clock domain force wakeup, restore the CPU power state to ON state before putting CPU clock domain under hardware control. Otherwise CPU wakeup might fail. The change is recommended for all OMAP4+ devices though the PRCM weakness was observed on OMAP5 devices first. As a result of weakness, lock-up is observed inside the hardware state machine of local CPU PRCM and results are UN-predictable as per designers. In software testing, we have seen hard-locks most of the time where system gets frozen. With power domain state restored, system behaves correctly. So update the code accordingly. Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 04 4月, 2013 10 次提交
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由 Javier Martinez Canillas 提交于
Besides being used to interface with external memory devices, the General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices such as ethernet controllers to OMAP2+ processors using the TI GPMC as a data bus. This patch allows an ethernet chip to be defined as an GPMC child device node. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
The gpmc_probe_nor_child() function is used in the GPMC driver to configure the GPMC for a NOR child device node. But this function is quite generic and all the NOR specific configuration is made by the driver of the actual NOR flash memory used. Other Pseudo-SRAM devices such as ethernet controllers need a similar setup so by making this function generic it can be used for those too. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com>
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由 Javier Martinez Canillas 提交于
gpmc_probe_nor_child() calls of_platform_device_create() to create a platform device for the NOR child. If this function fails the value of ret is returned to the caller but this value is zero since it was assigned the return of a previous call to gpmc_cs_program_settings() that had to succeed or otherwise gpmc_probe_nor_child() would have returned before. This means that if of_platform_device_create() fails, 0 will be returned to the caller instead of an appropriate error code. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
When the GPMC driver is probed, we call gpmc_mem_init() to see which chip-selects have already been configured and enabled by the boot-loader and allocate space for them. If we fail to allocate space for one chip-select, then we return failure from the probe and the GPMC driver will not be available. Rather than render the GPMC useless for all GPMC devices, if we fail to allocate space for one chip-select print a warning and disable the chip-select. This way other GPMC clients can still be used. There is no downside to this approach, because all GPMC clients need to request a chip-select before they can use the GPMC and on requesting a chip-select, if memory has not already been reserved for the chip-select then it will be. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
With commit 21cc2bda (ARM: OMAP2+: Remove apollon board support) the variable "boot_rom_space" is now not needed and the code surrounding this variable can be cleaned up and simplified. Remove unnecessary definitions and clean-up the comment as well. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Each GPMC chip-select can be configured to map 16MB, 32MB, 64MB or 128MB of address space. The physical base address where a chip-select starts is also configurable and must be aligned on a boundary that is equal to or greater than the size of the address space mapped bt the chip-select. When enabling a GPMC chip-select, ensure that the base address is aligned to the appropriate boundary. Reported-by: NMark Jackson <mpfj-list@mimc.co.uk> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
When booting with device-tree, retrieve GPMC settings for ONENAND from the device-tree blob. This will allow us to remove all static settings stored in the gpmc-nand.c in the future once the migration to device-tree is complete. The user must now specify the ONENAND device width in the device-tree binding so that the GPMC can be programmed correctly. Therefore, update the device-tree binding documentation for ONENAND devices connected to the GPMC to reflect this. Please note that this does not include GPMC timings for ONENAND. The timings are being calculated at runtime. There is some legacy code that only enables read wait monitoring for non-OMAP3 devices. There are no known OMAP3 device issues that prevent this feature being enabled and so when booting with device-tree use the wait-monitoring settings described in the device-tree blob. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
When booting with device-tree, retrieve GPMC settings for NAND from the device-tree blob. This will allow us to remove all static settings stored in the gpmc-nand.c in the future once the migration to device-tree is complete. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
NOR flash is not currently supported when booting with device-tree on OMAP2+ devices. Add support to detect and configure NOR devices when booting with device-tree. Add documentation for the TI GPMC NOR binding. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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由 Jon Hunter 提交于
Some of the GPMC timings parameters are currently missing from the GPMC device-tree binding. Add these parameters to the binding documentation as well as code to read them. Also add either "-ps" or "-ns" suffix to the GPMC timing properties to indicate whether the timing is in picoseconds or nanoseconds. The existing code in gpmc_read_timings_dt() is checking the value of of_property_read_u32() and only is successful storing the value read in the gpmc_timings structure. Checking the return value in this case is not necessary and we can simply read the value, if present, and store directly in the gpmc_timings structure. Therefore, simplify the code by removing these checks. The comment in the gpmc_read_timings_dt() function, "only for OMAP3430" is also incorrect as it is applicable to all OMAP3+ devices. So correct this too. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
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- 03 4月, 2013 6 次提交
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由 Archit Taneja 提交于
Structs for platform data of omapdss panels are found in headers in the 'include/video/' path. Board files populate these structs with platform specific values, and the panel driver uses these to configure the panel. Currently, each panel has it's own header in the above path. Move all the omapdss panel platform data structs to a single header omap-panel-data.h. This is useful because: - All other omapdss panel drivers will be modified to use platform data. This would lead to a lot of panel headers usable only by omapdss. A lot of these platform data structs are trivial, and don't really need a separate header. - Platform data would be eventually removed, and platform information would be passed via device tree. Therefore, omapdss panel platform data structs are temporary, and will be easier to remove if they are all in the same header. - All board files will have to include the same header to configure a panel's platform data, that makes the board files more consistent. Signed-off-by: NArchit Taneja <archit@ti.com>
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由 Roger Quadros 提交于
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Use usbhs_init_phys() to register the PHY's RESET regulator and NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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