1. 10 7月, 2012 1 次提交
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  3. 25 6月, 2012 1 次提交
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  8. 31 5月, 2012 1 次提交
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  10. 28 5月, 2012 17 次提交
  11. 25 5月, 2012 1 次提交
    • D
      sparc64: Fix several bugs in quad floating point emulation. · 456d3d42
      David S. Miller 提交于
      UltraSPARC-T2 and later do not use the fp_exception_other trap and do
      not set the floating point trap type field in the %fsr at all when you
      try to execute an unimplemented FPU operation.
      
      Instead, it uses the illegal_instruction trap and it leaves the
      floating point trap type field clear.
      
      So we should not validate the %fsr trap type field when do_mathemu()
      is invoked from the illegal instruction handler.
      
      Also, the floating point trap type field is 3 bits, not 4 bits.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      456d3d42
  12. 24 5月, 2012 1 次提交
  13. 22 5月, 2012 3 次提交