Semicolons are not necessary after switch/while/for/if braces
so remove them.
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This mirrors commit 196f02bf
(powerpc: perf_event: Add alignment-faults and emulation-faults software events)
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

`>>' has a higher precedence than `?' so src2 evaluated to
either 16 or 0 dependent on the bits set in rs2.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

o Move all files from sparc64/kernel/ to sparc/kernel
  - rename as appropriate
o Update sparc/Makefile to the changes
o Update sparc/kernel/Makefile to include the sparc64 files

NOTE: This commit changes link order on sparc64!

Link order had to change for either of sparc32 and sparc64.
And assuming sparc64 see more testing than sparc32 change link
order on sparc64 where issues will be caught faster.
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Copy the FPU state to the task's thread_info->fpregs for the VIS emulation
functions to access.
Signed-off-by: NHong H. Pham <hong.pham@windriver.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This patch fixes some bugs in VIS emulation that cause the GCC test
failure

FAIL: gcc.target/sparc/pdist-3.c execution test

for both 32-bit and 64-bit testing on hardware lacking these
instructions.  The emulation code for the pdist instruction uses
RS1(insn) for both source registers rs1 and rs2, which is obviously
wrong and leads to the instruction doing nothing (the observed
problem), and further inspection of the code shows that RS1 uses a
shift of 24 and RD a shift of 25, which clearly cannot both be right;
examining SPARC documentation indicates the correct shift for RS1 is
14.

This patch fixes the bug if single-stepping over the affected
instruction in the debugger, but not if the testcase is run
standalone.  For that, Wind River has another patch I hope they will
send as a followup to this patch submission.
Signed-off-by: NJoseph Myers <joseph@codesourcery.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

1) edge8 tables should be static
2) add vis_emul() extern decl. to asm/visasm.h
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

To add this logic, put the VIS instruction check at the
vis_emul() call site instead of inside of vis_emul().
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Niagara does not implement some of the VIS instructions in
hardware, so we have to emulate them.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>