When linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
mdio_bus mdio@803c0000: mdio sys ctl reg has not maped"

The source code about the subctrl is dealt syscon, but dts doesn't.
It cause such fault, so this patch adds the syscon info on dts files to
fixes it.
Signed-off-by: NKejian Yan <yankejian@huawei.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add PCIe host support for HiSilicon SoC Hip05, related DT binding
documentation, and maintainer update.

[bhelgaas: changelog, 32-bit only config write warning text]
Signed-off-by: NZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: NGabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Nliudongdong <liudongdong3@huawei.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org> (DT binding)

This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon Hip05-D02 development board.
Signed-off-by: NDing Tianhong <dingtianhong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Document "hisilicon,hi6220-sramctrl" for SRAM controller.
Signed-off-by: NLeo Yan <leo.yan@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon hi6220 SoC mobile platform.
Signed-off-by: NBintian Wang <bintian.wang@huawei.com>
Suggested-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Add dts file for Hisilicon hip01 ca9x2 board
Signed-off-by: NWang Long <long.wanglong@huawei.com>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>
[olof: Folded in smp enable-method from a different patch]
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add Hisilicon HiP04 SoC platform & Fabric controller.

Fabric controller could be used to configure snoop filter among multiple
clusters.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: NWei Xu <xuwei5@hisilicon.com>

Enable support for the Hisilicon HiX5HD2 SoC. This HiX5HD2 SoC series
support both single and dual Cortex-A9 cores.

Add ARCH_HIX5HD2 to distinguish HiX5HD2 from Hi3xxx.

They are different in implementation such as SMP, IPs integarted and
earlycon configure.
Signed-off-by: NHaifeng Yan <yanhaifeng@gmail.com>
Signed-off-by: NJiancheng Xue <jchxue@gmail.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: NWei Xu <xuwei5@hisilicon.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Suggest by Arnd: abstract mmc tuning as clock behavior,
also because different soc have different tuning method and registers.
hi3620_mmc_clks is added to handle mmc clock specifically on hi3620.
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Enable SMP support on hi3xxx platform
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: NZhang Mingjun <zhang.mingjun@linaro.org>
Tested-by: NLi Xin <li.xin@linaro.org>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
[khilman: fix checkpatch errors]
Signed-off-by: NKevin Hilman <khilman@linaro.org>

Add board support with device tree for Hisilicon Hi3620 SoC platform.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
[khilman: fix checkpatch errors]
[khilman: fold in patch which selects GPIO in Kconfig]
Signed-off-by: NKevin Hilman <khilman@linaro.org>