1. 23 2月, 2009 8 次提交
  2. 13 2月, 2009 3 次提交
  3. 11 2月, 2009 3 次提交
  4. 10 2月, 2009 2 次提交
  5. 02 2月, 2009 1 次提交
  6. 29 1月, 2009 1 次提交
    • K
      powerpc/fsl-booke: Cleanup init/exception setup to be runtime · 105c31df
      Kumar Gala 提交于
      We currently have a few variants of fsl-booke processors (e500v1, e500v2,
      e500mc, and e200).  They all have minor differences that we had previously
      been handling via ifdefs.
      
      To move towards having this support the following changes have been made:
      
      * PID1, PID2 only exist on e500v1 & e500v2 and should not be accessed on
        e500mc or e200.  We use MMUCFG[NPIDS] to determine which case we are
        since we only touch PID1/2 in extremely early init code.
      
      * Not all IVORs exist on all the processors so introduce cpu_setup
        functions for each variant to setup the proper IVORs that are either
        unique or exist but have some variations between the processors
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      105c31df
  7. 28 1月, 2009 1 次提交
    • R
      powerpc/pseries: Correct VIO bus accounting problem in CMO env. · 69b052e8
      Robert Jennings 提交于
      In the VIO bus code the wrappers for dma alloc_coherent and free_coherent
      calls are rounding to IOMMU_PAGE_SIZE.  Taking a look at the underlying
      calls, the actual mapping is promoted to PAGE_SIZE.  Changing the
      rounding in these two functions fixes under-reporting the entitlement
      used by the system.  Without this change, the system could run out of
      entitlement before it believes it has and incur mapping failures at the
      firmware level.
      
      Also in the VIO bus code, the wrapper for dma map_sg is not exiting in
      an error path where it should.  Rather than fall through to code for the
      success case, this patch adds the return that is needed in the error path.
      Signed-off-by: NRobert Jennings <rcj@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      69b052e8
  8. 16 1月, 2009 1 次提交
  9. 14 1月, 2009 1 次提交
  10. 13 1月, 2009 6 次提交
  11. 08 1月, 2009 9 次提交
    • K
      powerpc: Export cacheable_memzero as its now used in a driver · 1edda9c7
      Kumar Gala 提交于
      The Freescale PowerPC specific gianfar driver (gig-e) uses
      cacheable_memzero for performance reasons we need to export
      the symbol to allow the driver to be built as a module.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1edda9c7
    • I
      powerpc: Use correct type in prom_init.c · 2b931fb6
      Ingo Molnar 提交于
      tce_entryp is a "u64 *" not an "unsigned long *".
      
      [Split from a large patch -sfr]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2b931fb6
    • S
      powerpc: Remove unnecessary casts · 63277161
      Stephen Rothwell 提交于
      of_get_flat_dt_prop() returns a "void *", so we don't need to cast when
      assigning its result to a pointer variable.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      63277161
    • P
      powerpc: Fix pciconfig_iobase system call on PCI-Express powermac · 16124f10
      Paul Mackerras 提交于
      X has been failing to start on my quad G5 powermac since commit
      1fd0f525 ("powerpc: Fix domain numbers
      in /proc on 64-bit") went in.  The reason is that the change allows X
      to see the PCI-PCI bridge above the video card (previously it was
      obscured by the fact that there were two "00" directories in
      /proc/bus/pci), and the pciconfig_iobase system call on the bridge is
      failing because of a hack that we have to return information about the
      AGP bus when X asks about bus 0.  This machine doesn't have an AGP bus
      (it has PCI Express) and so the pciconfig_iobase call is returning -1,
      which ultimately causes X to fail to start.
      
      This fixes it by checking that we have an AGP bridge before
      redirecting the pciconfig_iobase call to return information about the
      AGP bus.  With this, X starts successfully both on a quad G5 with
      PCI Express and on an older dual G5 with AGP.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      16124f10
    • N
      powerpc: Rewrite sysfs processor cache info code · 93197a36
      Nathan Lynch 提交于
      The current code for providing processor cache information in sysfs
      has the following deficiencies:
      - several complex functions that are hard to understand
      - implicit recursion (cache_desc_release -> kobject_put -> cache_desc_release)
      - explicit recursion (create_cache_index_info)
      - use of two per-cpu arrays when one would suffice
      - duplication of work on systems where CPUs share cache
      
      Also, when I looked at implementing support for a shared_cpu_map
      attribute, it was pretty much impossible to handle hotplug without
      checking every single online CPU's cache_desc list and fixing things
      up... not that this is a hot path, but it would have introduced
      O(n^2)-ish behavior during boot.  Addressing this involved rethinking
      the core data structures used, which didn't lend itself to an
      incremental approach.
      
      This implementation maintains a "forest" (potentially more than one
      tree) of cache objects which reflects the system's cache topology.
      Cache objects are instantiated as needed as CPUs come online.  A
      per-cpu array is used mainly for sysfs-related bookkeeping; the
      objects in the array just point to the appropriate points in the
      forest.
      
      This maintains compatibility with the existing code and includes some
      enhancements:
      - Implement the shared_cpu_map attribute, which is essential for
        enabling userspace to discover the system's overall cache topology.
      - Use cache-block-size properties if cache-line-size is not available.
      
      I chose to place this implementation in a new file since it would have
      roughly doubled the size of sysfs.c, which is already kind of messy.
      Signed-off-by: NNathan Lynch <ntl@pobox.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      93197a36
    • B
      powerpc/pci: Reserve legacy regions on PCI · c1f34302
      Benjamin Herrenschmidt 提交于
      There's a problem on some embedded platforms when we re-assign
      everything on PCI, such as 44x. The generic code tries to avoid
      assigning devices to addresses overlapping the low legacy
      addresses such as VGA hard decoded areas using constants that
      are unfortunately no good for us, as they don't take into account
      the address translation we do to access PCI busses.
      
      Thus we end up allocating things like IO BARs to 0, which is
      technically legal, but will shadow hard decoded ports for use
      by things like VGA cards.
      
      This works around it by attempting to reserve legacy regions
      before we try to assign addresses.
      
      NOTE: This may have nasty side effects in cases I haven't tested
      yet:
      
       - We try to use FW mappings (ie. powermac) and the FW has allocated
      a conflicting address over those legacy regions. This will typically
      happen. I would expect the new code to just fail with an informative
      message without harm but I haven't had a chance to test that scenario
      yet.
      
       - A device with fixed BARs overlapping those legacy addresses such
      as an IDE controller in legacy mode is in the system. I don't know
      for sure yet what will happen there, I have to test :-)
      
      Ideally, we should change PCIBIOS_MIN_IO/MIN_MEM accross the board
      to take a bus pointer so they can provide appropriate per-bus translated
      values to the generic code but that's a more invasive patch. I will
      do that in the future, but in the meantime, this fixes the problem
      locally
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c1f34302
    • T
      powerpc/fsl-booke: Remove num_tlbcam_entries · 6fd8be4b
      Trent Piepho 提交于
      This is a global variable defined in fsl_booke_mmu.c with a value that gets
      initialized in assembly code in head_fsl_booke.S.
      
      It's never used.
      
      If some code ever does want to know the number of entries in TLB1, then
      "numcams = mfspr(SPRN_TLB1CFG) & 0xfff", is a whole lot simpler than a
      global initialized during kernel boot from assembly.
      Signed-off-by: NTrent Piepho <tpiepho@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      6fd8be4b
    • T
      powerpc/fsl-booke: Don't hard-code size of struct tlbcam · 19f5465e
      Trent Piepho 提交于
      Some assembly code in head_fsl_booke.S hard-coded the size of struct tlbcam
      to 20 when it indexed the TLBCAM table.  Anyone changing the size of struct
      tlbcam would not know to expect that.
      
      The kernel already has a system to get the size of C structures into
      assembly language files, asm-offsets, so let's use it.
      
      The definition of the struct gets moved to a header, so that asm-offsets.c
      can include it.
      Signed-off-by: NTrent Piepho <tpiepho@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      19f5465e
    • B
      PCI: powerpc: use generic pci_swizzle_interrupt_pin() · 3f9455d4
      Bjorn Helgaas 提交于
      Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code.
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      3f9455d4
  12. 07 1月, 2009 1 次提交
  13. 06 1月, 2009 1 次提交
  14. 01 1月, 2009 1 次提交
  15. 31 12月, 2008 1 次提交
    • H
      KVM: ppc: Implement in-kernel exit timing statistics · 73e75b41
      Hollis Blanchard 提交于
      Existing KVM statistics are either just counters (kvm_stat) reported for
      KVM generally or trace based aproaches like kvm_trace.
      For KVM on powerpc we had the need to track the timings of the different exit
      types. While this could be achieved parsing data created with a kvm_trace
      extension this adds too much overhead (at least on embedded PowerPC) slowing
      down the workloads we wanted to measure.
      
      Therefore this patch adds a in-kernel exit timing statistic to the powerpc kvm
      code. These statistic is available per vm&vcpu under the kvm debugfs directory.
      As this statistic is low, but still some overhead it can be enabled via a
      .config entry and should be off by default.
      
      Since this patch touched all powerpc kvm_stat code anyway this code is now
      merged and simplified together with the exit timing statistic code (still
      working with exit timing disabled in .config).
      Signed-off-by: NChristian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      73e75b41