- 24 12月, 2007 2 次提交
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由 Valentine Barshak 提交于
This is a UIC cascade handler rework to use set_irq_chained_handler() for cascade, just like othe ppc platforms do. With current implementation we have additional redirection for irq handler and we call generic_handle_irq twice (once for the primary uic and the other time for handling cascade interrupt). This causes Ingo's realtime support patch to stop working on 4xx. Not sure of any other possible problems though, but with set_irq_chained_handler() we can abolish "struct irqaction cascade" from the chip descriptor and call generic_handle_irq() once, directly for cascade irq. Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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由 Valentine Barshak 提交于
This patch makes PowerPC 4xx UIC use generic level irq handler instead of a custom handle_uic_irq() function. We ack only edge irqs in mask_ack callback, since acking a level irq on UIC has no effect if the interrupt is still asserted by the device, even if the interrupt is already masked. So, to really de-assert the interrupt we need to de-assert the external source first *and* ack it on UIC then. The handle_level_irq() function masks and ack's the interrupt with mask_ack callback prior to calling the actual ISR and unmasks it at the end. So, to use it with UIC interrupts we need to ack level irqs in the unmask callback instead, after the ISR has de-asserted the external interrupt source. Even if we ack the interrupt that we didn't handle (unmask/ack it at the end of the handler, while next irq is already pending) it will not de-assert the irq, untill we de-assert its exteral source. Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 19 11月, 2007 1 次提交
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由 Valentine Barshak 提交于
This adds uic_mask_ack_irq() callback to PowerPC 4xx uic code to avoid kernel crash. It is used for edge-triggered interrupts by handle_uic_irq(). Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
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- 13 9月, 2007 2 次提交
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由 Michael Ellerman 提交于
The most common match semantic is an exact match based on the device node. So provide a default implementation that does this, and hook it up if no match routine is specified. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Michael Ellerman 提交于
The majority of irq_host implementations (3 out of 4) are associated with a device_node, and need to stash it somewhere. Rather than having it somewhere different for each host, add an optional device_node pointer to the irq_host structure. Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 17 8月, 2007 3 次提交
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由 David Gibson 提交于
At present the cascade interrupt handler for the UIC (interrupt controller on 4xx embedded chips) will misbehave badly if it is called spuriously - that is if the handler is invoked when no interrupts are asserted in the child UIC. Although spurious interrupts shouldn't happen, it's good to behave robustly if they do. This patch does so by checking for and ignoring spurious interrupts. Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 David Gibson 提交于
At present the driver for the UIC (the embedded interrupt controller in 4xx chips) uses the handle_level_irq() flow handler. It turns out this does not correctly handle level triggered interrupts on the UIC. Specifically, acknowledging an irq on the UIC (i.e. clearing the relevant bit in UIC_SR) will have no effect for a level interrupt which is still asserted by the external device, even if the irq is already masked. Therefore, unlike handle_level_irq() we must ack the interrupt after invoking the ISR (which should cause the device to stop asserting the irq) instead of acking it when we mask it, before the ISR. This patch implements this change, in a new handle_uic_irq(), a customised irq flow handler for the UIC. For edge triggered interrupts, handle_uic_irq() still uses the old flow - we must ack edge triggered interrupt before the ISR not after, or we could miss a second event which occurred between invoking the ISR and acking the irq. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 David Gibson 提交于
The UIC (interrupt controller in 4xx embedded CPUs) driver currently missets the IRQ_lEVEL flag in desc->status, due to a thinko. This patch fixes the bug. Currently this is only a cosmetic problem (affects the output in /proc/interrupts), however subsequent patches will use the IRQ_LEVEL flag to affect flow handling. Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 07 5月, 2007 1 次提交
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由 Stephen Rothwell 提交于
for consistency with other Open Firmware interfaces (and Sparc). This is just a straight replacement. This leaves the compatibility define in place. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 30 4月, 2007 1 次提交
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由 Stephen Rothwell 提交于
Just another pass through arch/powerpc for old usages. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 24 4月, 2007 1 次提交
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由 David Gibson 提交于
This patch adds a driver to arch/powerpc/sysdev for the UIC, the on-chip interrupt controller from IBM/AMCC 4xx chips. It uses the new irq host mapping infrastructure. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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