1. 01 3月, 2010 9 次提交
    • P
      drm/radeon: Fix printf type warning in 64bit system. · 55a5cb5d
      Pauli Nieminen 提交于
      Type of iterator was promoted to unsigned long in 64bit systems.
      
      *header is small structure so it is alwas safe to cast return value
      of sizeof operator to int.
      Signed-off-by: NPauli Nieminen <suokkos@gmail.com>
      55a5cb5d
    • D
    • D
      vga_switcheroo: initial implementation (v15) · 6a9ee8af
      Dave Airlie 提交于
      Many new laptops now come with 2 gpus, one to be used for low power
      modes and one for gaming/on-ac applications. These GPUs are typically
      wired to the laptop panel and VGA ports via a multiplexer unit which
      is controlled via ACPI methods.
      
      4 combinations of systems typically exist - with 2 ACPI methods.
      Intel/ATI - Lenovo W500/T500 - use ATPX ACPI method
      ATI/ATI - some ASUS - use ATPX ACPI Method
      Intel/Nvidia - - use _DSM ACPI method
      Nvidia/Nvidia -  - use _DSM ACPI method.
      
      TODO:
      This patch adds support for the ATPX method and initial bits
      for the _DSM methods that need to written by someone with
      access to the hardware.
      Add a proper non-debugfs interface - need to get some proper
      testing first.
      
      v2: add power up/down support for both devices
      on W500 puts i915/radeon into D3 and cuts power to radeon.
      
      v3: redo probing methods, no DMI list, drm devices call to
      register with switcheroo, it tries to find an ATPX method on
      any device and once there is two devices + ATPX it inits the
      switcher.
      
      v4: ATPX msg handling using buffers - should work on more machines
      
      v5: rearchitect after more mjg59 discussion - move ATPX handling to
          radeon driver.
      
      v6: add file headers + initial nouveau bits (to be filled out).
      
      v7: merge delayed switcher code.
      
      v8: avoid suspend/resume of gpu that is off
      
      v9: rearchitect - mjg59 is always right. - move all ATPX code to
      radeon, should allow simpler DSM also proper ATRM handling
      
      v10: add ATRM support for radeon BIOS, add mutex to lock vgasr_priv
      
      v11: fix bug in resuming Intel for 2nd time.
      
      v12: start fixing up nvidia code blindly.
      
      v13: blindly guess at finishing nvidia code
      
      v14: remove radeon audio hacks - fix up intel resume more like upstream
      
      v15: clean up printks + remove unnecessary igd/dis pointers
      
      mount debugfs
      
      /sys/kernel/debug/vgaswitcheroo/switch - should exist if ATPX detected
       + 2 cards.
      
      DIS - immediate change to discrete
      IGD - immediate change to IGD
      DDIS - delayed change to discrete
      DIGD - delayed change to IGD
      ON - turn on not in use
      OFF - turn off not in use
      
      Tested on W500 (Intel/ATI) and T500 (Intel/ATI)
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      6a9ee8af
    • R
      6d9c1351
    • R
      Revert "drm/radeon/kms: disable HDMI audio for now on rv710/rv730" · 3464f114
      Rafał Miłecki 提交于
      This commit "disabled" audio on RV710 and RV740 only, leaving RV770 and RV730.
      The order is: CHIP_RV770 < CHIP_RV730 < CHIP_RV710 < CHIP_RV740.
      
      It is not needed anway, as we do not even try to enable audio on RV770 and
      newer. We call initializing function in r600.c only, not in rv770.c.
      
      If there is something causing green tinges, it's HDMI mode setting for encoder
      and I will try to debug that.
      Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      3464f114
    • R
    • D
      drm/radeon: r100/r200 ums: block ability for userspace app to trash 0 page and beyond · 566d84d1
      Dave Airlie 提交于
      radeon's have a special ability to passthrough writes in their internal
      memory space directly to PCI, this ability means that if some of the internal
      surfaces like the depth buffer point at 0x0, any writes to these will
      go directly to RAM at 0x0 via PCI busmastering.
      
      Now mesa used to always emit clears after emitting state, since the
      radeon mesa driver was refactored a year or more ago, it was found it
      could generate a clear request without ever sending any setup state to the
      card. So the clear would attempt to clear the depth buffer at 0x0, which
      would overwrite main memory at this point. fs corruption ensues.
      
      Also once one app did this correctly, it would never get set back to 0
      making this messy to reproduce.
      
      The kernel should block this from happening as mesa runs without privs,
      though it does require the user be connected to the current running X session.
      
      This patch implements a check to make sure the depth offset has been set
      before a depth clear occurs and if it finds one it prints a warning and
      ignores the depth clear request. There is also a mesa fix to avoid sending
      the badness going into mesa.
      
      This only affects r100/r200 GPUs in user modesetting mode.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      566d84d1
    • M
      drm/radeon: use ALIGN instead of open coding it · d964fc54
      Matt Turner 提交于
      Cc: Jerome Glisse <jglisse@redhat.com>
      Cc: Alex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NMatt Turner <mattst88@gmail.com>
      Reviewed-by: NCorbin Simpson <MostAwesomeDude@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      d964fc54
    • J
      drm/radeon/kms: initialize set_surface_reg reg for rs600 asic · 32b3c2ab
      Jerome Glisse 提交于
      rs600 asic was missing set_surface_reg callback leading to
      oops.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      32b3c2ab
  2. 27 2月, 2010 20 次提交
  3. 25 2月, 2010 11 次提交