1. 08 1月, 2013 7 次提交
  2. 16 5月, 2012 1 次提交
  3. 03 3月, 2012 1 次提交
  4. 15 2月, 2012 2 次提交
  5. 07 1月, 2012 2 次提交
    • M
      PCI: x86: use generic pcibios_set_master() · b9a276ad
      Myron Stowe 提交于
      This patch removes x86's architecture-specific 'pcibios_set_master()'
      routine and lets the default PCI core based implementation handle PCI
      device 'latency timer' setup.
      
      No functional change.
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      b9a276ad
    • M
      PCI: Pull PCI 'latency timer' setup up into the core · 96c55900
      Myron Stowe 提交于
      The 'latency timer' of PCI devices, both Type 0 and Type 1,
      is setup in architecture-specific code [see: 'pcibios_set_master()'].
      There are two approaches being taken by all the architectures - check
      if the 'latency timer' is currently set between 16 and 255 and if not
      bring it within bounds, or, do nothing (and then there is the
      gratuitously different PA-RISC implementation).
      
      There is nothing architecture-specific about PCI's 'latency timer' so
      this patch pulls its setup functionality up into the PCI core by
      creating a generic 'pcibios_set_master()' function using the '__weak'
      attribute which can be used by all architectures as a default which,
      if necessary, can then be over-ridden by architecture-specific code.
      
      No functional change.
      Signed-off-by: NMyron Stowe <myron.stowe@redhat.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      96c55900
  6. 01 11月, 2011 1 次提交
    • P
      x86: Fix files explicitly requiring export.h for EXPORT_SYMBOL/THIS_MODULE · 69c60c88
      Paul Gortmaker 提交于
      These files were implicitly getting EXPORT_SYMBOL via device.h
      which was including module.h, but that will be fixed up shortly.
      
      By fixing these now, we can avoid seeing things like:
      
      arch/x86/kernel/rtc.c:29: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL’
      arch/x86/kernel/pci-dma.c:20: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL’
      arch/x86/kernel/e820.c:69: warning: type defaults to ‘int’ in declaration of ‘EXPORT_SYMBOL_GPL’
      
      [ with input from Randy Dunlap <rdunlap@xenotime.net> and also
        from Stephen Rothwell <sfr@canb.auug.org.au> ]
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      69c60c88
  7. 18 3月, 2011 1 次提交
  8. 18 12月, 2010 2 次提交
  9. 27 10月, 2010 1 次提交
  10. 18 10月, 2010 1 次提交
  11. 17 7月, 2010 1 次提交
    • B
      PCI: fall back to original BIOS BAR addresses · 58c84eda
      Bjorn Helgaas 提交于
      If we fail to assign resources to a PCI BAR, this patch makes us try the
      original address from BIOS rather than leaving it disabled.
      
      Linux tries to make sure all PCI device BARs are inside the upstream
      PCI host bridge or P2P bridge apertures, reassigning BARs if necessary.
      Windows does similar reassignment.
      
      Before this patch, if we could not move a BAR into an aperture, we left
      the resource unassigned, i.e., at address zero.  Windows leaves such BARs
      at the original BIOS addresses, and this patch makes Linux do the same.
      
      This is a bit ugly because we disable the resource long before we try to
      reassign it, so we have to keep track of the BIOS BAR address somewhere.
      For lack of a better place, I put it in the struct pci_dev.
      
      I think it would be cleaner to attempt the assignment immediately when the
      claim fails, so we could easily remember the original address.  But we
      currently claim motherboard resources in the middle, after attempting to
      claim PCI resources and before assigning new PCI resources, and changing
      that is a fairly big job.
      
      Addresses https://bugzilla.kernel.org/show_bug.cgi?id=16263Reported-by: NAndrew <nitr0@seti.kr.ua>
      Tested-by: NAndrew <nitr0@seti.kr.ua>
      Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      58c84eda
  12. 12 6月, 2010 1 次提交
  13. 27 4月, 2010 1 次提交
  14. 25 3月, 2010 1 次提交
  15. 23 2月, 2010 2 次提交
  16. 11 2月, 2010 1 次提交
  17. 05 12月, 2009 1 次提交
  18. 05 11月, 2009 4 次提交
  19. 28 9月, 2009 1 次提交
  20. 11 7月, 2009 1 次提交
    • Y
      x86/pci: insert ioapic resource before assigning unassigned resources · 857fdc53
      Yinghai Lu 提交于
      Stephen reported that his DL585 G2 needed noapic after 2.6.22 (?)
      
      Dann bisected it down to:
        commit 30a18d6c
        Date:   Tue Feb 19 03:21:20 2008 -0800
      
            x86: multi pci root bus with different io resource range, on
            64-bit
      
      It turns out that:
        1. that AMD-based systems have two HT chains.
        2. BIOS doesn't allocate resources for BAR 6 of devices under 8132 etc
        3. that multi-peer-root patch will try to split root resources to peer
           root resources according to PCI conf of NB
        4. PCI core assigns unassigned resources, but they overlap with BARs
           that are used by ioapic addr of io4 and 8132.
      
      The reason: at that point ioapic address are not inserted yet.  Solution
      is to insert ioapic resources into the tree a bit earlier.
      Reported-by: NStephen Frost <sfrost@snowman.net>
      Reported-and-Tested-by: Ndann frazier <dannf@hp.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: stable@kernel.org
      Signed-off-by: NJesse Barnes <jbarnes@jbarnes-g45.(none)>
      857fdc53
  21. 18 6月, 2009 1 次提交
  22. 23 4月, 2009 1 次提交
  23. 04 4月, 2009 1 次提交
    • S
      x86, PAT: Remove duplicate memtype reserve in pci mmap · 5a3ae276
      Suresh Siddha 提交于
      pci mmap code was doing memtype reserve for a while now. Recently we
      added memtype tracking in remap_pfn_range, and pci code indirectly calls
      remap_pfn_range. So, we don't need seperate tracking in pci code
      anymore. Which means a patch that removes ~50 lines of code :-).
      
      Also, recently we found out that the pci tracking is not working as we expect
      it to work in some cases. Specifically, userlevel X mmap of pci, with some
      recent version of X, is having a problem with vm_page_prot getting reset.
      The pci tracking uses vm_page_prot to pass on the protection type from parent
      to child during fork.
      a) Parent does a pci mmap
      b) We look at PAT and get either UC_MINUS or WC mapping for parent
      c) Store that mapping type in vma vm_page_prot for future use
      d) This thread does a fork
      e) Fork results in mmap_ops ->open for the child process
      f) We get the vm_page_prot from vma and reserve that type for the child process
      
      But, between c) and e) above, the vma vm_page_prot is getting reset to zero.
      This results in PAT reserve failing at the time of fork as in here.
      http://marc.info/?l=linux-kernel&m=123858163103240&w=2
      
      This cleanup makes the above problem go away as we do not depend on
      vm_page_prot in our PAT code anymore.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      5a3ae276
  24. 24 3月, 2009 1 次提交
  25. 14 1月, 2009 1 次提交
  26. 08 1月, 2009 1 次提交
  27. 30 12月, 2008 1 次提交