1. 17 1月, 2006 2 次提交
  2. 16 1月, 2006 2 次提交
    • K
      [PATCH] Use atomic64_set for 64-bit case of atomic_long_set · 6b4977ce
      Kyle McMartin 提交于
      For some reason, the BITS_PER_LONG == 64 case of atomic_long_set
      was using atomic_set instead of atomic64_set. This does not jive
      with architectures which use an inline instead of a #define to
      implement their atomic_set() primitives.
      Signed-off-by: NKyle McMartin <kyle@parisc-linux.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      6b4977ce
    • R
      [ARM] Fix missing compiler.h include · ef0498a7
      Russell King 提交于
      asm/mach/arch.h introduced a __deprecated, but didn't include compiler.h,
      causing:
      
      In file included from arch/arm/mach-at91rm9200/devices.c:13:
      include/asm/mach/arch.h:23: warning: no semicolon at end of struct or union
      include/asm/mach/arch.h:23: error: syntax error before 'phys_ram'
      include/asm/mach/arch.h:34: error: syntax error before ':' token
      include/asm/mach/arch.h:35: error: syntax error before ':' token
      include/asm/mach/arch.h:36: error: syntax error before ':' token
      include/asm/mach/arch.h:37: error: syntax error before ':' token
      include/asm/mach/arch.h:45: error: syntax error before '}' token
      
      Add the necessary include.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ef0498a7
  3. 15 1月, 2006 32 次提交
  4. 14 1月, 2006 4 次提交
    • A
      [PATCH] spi: remove fastcall crap · 5d870c8e
      Andrew Morton 提交于
      gcc4 generates warnings when a non-FASTCALL function pointer is assigned to a
      FASTCALL one.  Perhaps it has taste.
      
      Cc: David Brownell <david-b@pacbell.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      5d870c8e
    • V
      [PATCH] spi: use linked lists rather than an array · 8275c642
      Vitaly Wool 提交于
      This makes the SPI core and its users access transfers in the SPI message
      structure as linked list not as an array, as discussed on LKML.
      
      From: David Brownell <dbrownell@users.sourceforge.net>
      
        Updates including doc, bugfixes to the list code, add
        spi_message_add_tail().  Plus, initialize things _before_ grabbing the
        locks in some cases (in case it grows more expensive).  This also merges
        some bitbang updates of mine that didn't yet make it into the mm tree.
      Signed-off-by: NVitaly Wool <vwool@ru.mvista.com>
      Signed-off-by: NDmitry Pervushin <dpervushin@gmail.com>
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      8275c642
    • M
      [PATCH] spi: M25 series SPI flash · 2f9f7628
      Mike Lavender 提交于
      This was originally a driver for the ST M25P80 SPI flash.  It's been
      updated slightly to handle other M25P series chips.
      
      For many of these chips, the specific type could be probed, but for now
      this just requires static setup with flash_platform_data that lists the
      chip type (size, format) and any default partitioning to use.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Cc: Mike Lavender <mike@steroidmicros.com>
      Cc: David Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2f9f7628
    • D
      [PATCH] spi: add spi_bitbang driver · 9904f22a
      David Brownell 提交于
      This adds a bitbanging spi master, hooking up to board/adapter-specific glue
      code which knows how to set and read the signals (gpios etc).
      
      This code kicks in after the glue code creates a platform_device with the
      right platform_data.  That data includes I/O loops, which will usually
      come from expanding an inline function (provided in the header).  One goal
      is that the I/O loops should be easily optimized down to a few GPIO register
      accesses, in common cases, for speed and minimized overhead.
      
      This understands all the currently defined protocol tweaking options in the
      SPI framework, and might eventually serve as as reference implementation.
      
        - different word sizes (1..32 bits)
        - differing clock rates
        - SPI modes differing by CPOL (affecting chip select and I/O loops)
        - SPI modes differing by CPHA (affecting I/O loops)
        - delays (usecs) after transfers
        - temporarily deselecting chips in mid-transfer
      
      A lot of hardware could work with this framework, though common types of
      controller can't reach peak performance without switching to a driver
      structure that supports pipelining of transfers (e.g.  DMA queues) and maybe
      controllers (e.g.  IRQ driven).
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      9904f22a