- 13 8月, 2015 7 次提交
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由 Thierry Reding 提交于
Instead of duplicating most of the code to set up a debugfs file, use the existing DRM core debugfs infrastructure instead. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The head state registers are per head, so they must be properly indexed. This has worked fine so far because all boards with eDP use it as the primary output, so it is very likely to end up attached to head 0. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The data structure is always only read, never written, and can hence be referred to by a const pointer. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
When tearing down debugfs support, make sure to reset the fields to NULL in the correct order, otherwise the debugfs root will not be properly removed. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The DRM minor is needed to teardown debugfs, so it needs to be tracked to prevent a crash on driver removal. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
When probing the SOR device fails, output proper error messages to help diagnose the cause of the failure. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The TRM lists indexed registers without an underscore to separate name from index. Use that convention in the driver for consistency. While at it, rename some of the field names to the names used in the TRM. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 03 4月, 2015 3 次提交
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由 Tomeu Vizoso 提交于
As there isn't a way for the firmware on the Nyan Chromebooks to hand over the display to the kernel, and the kernel isn't redoing the whole configuration at present. With this patch, the SOR is brought to a known state and we get correct display on every boot. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Use a sized unsigned 32-bit data type (u32) to store register contents. The SOR registers are 32 bits wide irrespective of the architecture's data width. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 27 1月, 2015 11 次提交
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由 Thierry Reding 提交于
Previously output drivers would enable continuous display mode and power up the display controller at various points during the initialization. This is suboptimal because it accesses display controller registers in output drivers and duplicates a bit of code. Move this code into the display controller driver and enable the display controller as the final step of the ->mode_set_nofb() implementation. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
All output drivers have now been converted to use the ->atomic_check() callback, so the ->mode_fixup() callbacks are no longer used. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The implementation of the ->atomic_check() callback precomputes all parameters to check if the given configuration can be applied. If so the precomputed values are stored in the atomic state object for the encoder and applied during modeset. In that way the modeset no longer needs to perform any checking but simply program values into registers. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Hook up the default ->reset() and ->atomic_duplicate_state() helpers. This ensures that state objects are properly created and framebuffer reference counts correctly maintained. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Implement initial atomic state handling. Hook up the CRTCs, planes' and connectors' ->atomic_destroy_state() callback to ensure that the atomic state objects don't leak. Furthermore the CRTC now implements the ->mode_set_nofb() callback that is used by new helpers to implement ->mode_set() and ->mode_set_base(). These new helpers also make use of the new plane helper functions which the driver now provides. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The tegra_output_exit() and tegra_output_remove() functions cannot fail, so make them return void. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The tegra_output midlayer is now completely gone and output drivers use it purely as a helper library. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The debugfs cleanup code never fails, so no error is returned. Therefore the functions can all return void instead. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Implement encoder and connector within the eDP driver itself using the Tegra output helpers rather than using the Tegra output as midlayer. By doing so one level of indirection is removed and output drivers become more flexible while keeping the majority of the advantages provided by the common output helpers. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Previously output drivers would all stop the display controller in their disable path. However with the transition to atomic modesetting the display controller needs to be kept running until all planes have been disabled so that software can properly determine (using VBLANK counts) when it is safe to remove the framebuffers associated with the planes. Moving this code into the display controller's disable path also gets rid of the duplication of this into all output drivers. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
All output drivers have open-coded variants of this function, so export it to remove some code duplication. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 04 8月, 2014 4 次提交
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由 Stephen Warren 提交于
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow the module to be auto-loaded since the module will match the devices instantiated from device tree. (Notes for stable: in 3.14+, just git rm any conflicting file, since they are added in later kernels. For 3.13 and below, manual merging will be needed) Cc: <stable@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
Program the sync signal polarities according to the display mode. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Stéphane Marchesin 提交于
This change uses the value of bits-per-color from panel to remove one more hardcoded value. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Dan Carpenter 提交于
We should unlock before returning the error code. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 17 7月, 2014 2 次提交
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由 Thierry Reding 提交于
This commit converts the PMC support code to a platform driver. Because the boot process needs to call into this driver very early, also set up a minimal environment via an early initcall. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
In order to not clutter the include/linux directory with SoC specific headers, move the Tegra-specific headers out into a separate directory. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 09 6月, 2014 10 次提交
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由 Thierry Reding 提交于
According to the DP specification the disparity of the first symbol should always be negative. It is therefore safe to assume that panels will conform to that and therefore parameterizing this field should never be necessary. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Instead of always enabling all four lanes, enable only the number probed from the link. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Power on only those lanes required for the specified link. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Interlaced mode is currently not supported on the SOR, so don't program any associated registers. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Use the speed probed from the link at runtime rather than relying on a hardcoded default. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The number of HBLANK and VBLANK symbols can be computed at runtime so that they can be set appropriately depending on the video mode and DP link. These values are used by the packet generation logic to determine how many audio samples can be transferred during the blanking intervals. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The currently hardcoded link parameters don't work on all eDP panels, so compute the parameters at runtime depending on the mode and panel type to allow the driver to cope with a wider variety of panels. Note that the number of bits per pixel of the panel is still hardcoded, but this can be addressed in a separate patch. This is largely based on a patch by Stéphane Marchesin but the algorithm was largely rewritten to be more readable and concise. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Stéphane Marchesin 提交于
Lanes are powered up in decreasing order. Power them down in increasing order for consistency. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Stéphane Marchesin 提交于
The comment above mentions link A/B but this isn't what the code does, so let's fix that. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Stéphane Marchesin 提交于
The code currently rounds up the clock to the next MHZ, which is rounding up a 69.5MHz clock to 70MHz on my machine. This in turn prevents the display from syncing. Removing this rounding fixes eDP for me. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 06 6月, 2014 3 次提交
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由 Thierry Reding 提交于
Other output drivers set up debugfs slightly differently. Bring the SOR driver in line with those for consistency. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
Removing only the root directory will fail when there are still files in it. Instead of manually removing all files, remove the whole directory recursively. Signed-off-by: NThierry Reding <treding@nvidia.com> -
由 Thierry Reding 提交于
The DRM core can now cope with drivers that don't have an associated struct drm_bus, so the host1x implementation is no longer useful. Signed-off-by: NThierry Reding <treding@nvidia.com>
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