1. 18 7月, 2007 6 次提交
  2. 17 7月, 2007 1 次提交
    • Y
      serial: convert early_uart to earlycon for 8250 · 18a8bd94
      Yinghai Lu 提交于
      Beacuse SERIAL_PORT_DFNS is removed from include/asm-i386/serial.h and
      include/asm-x86_64/serial.h.  the serial8250_ports need to be probed late in
      serial initializing stage.  the console_init=>serial8250_console_init=>
      register_console=>serial8250_console_setup will return -ENDEV, and console
      ttyS0 can not be enabled at that time.  need to wait till uart_add_one_port in
      drivers/serial/serial_core.c to call register_console to get console ttyS0.
      that is too late.
      
      Make early_uart to use early_param, so uart console can be used earlier.  Make
      it to be bootconsole with CON_BOOT flag, so can use console handover feature.
      and it will switch to corresponding normal serial console automatically.
      
      new command line will be:
      	console=uart8250,io,0x3f8,9600n8
      	console=uart8250,mmio,0xff5e0000,115200n8
      or
      	earlycon=uart8250,io,0x3f8,9600n8
      	earlycon=uart8250,mmio,0xff5e0000,115200n8
      
      it will print in very early stage:
      	Early serial console at I/O port 0x3f8 (options '9600n8')
      	console [uart0] enabled
      later for console it will print:
      	console handover: boot [uart0] -> real [ttyS0]
      
      Signed-off-by: <yinghai.lu@sun.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Gerd Hoffmann <kraxel@suse.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      18a8bd94
  3. 12 7月, 2007 2 次提交
    • R
      [IA64] Support multiple CPUs going through OS_MCA · 1612b18c
      Russ Anderson 提交于
      Linux does not gracefully deal with multiple processors going
      through OS_MCA aa part of the same MCA event.  The first cpu
      into OS_MCA grabs the ia64_mca_serialize lock.  Subsequent
      cpus wait for that lock, preventing them from reporting in as
      rendezvoused.  The first cpu waits 5 seconds then complains
      that all the cpus have not rendezvoused.  The first cpu then
      handles its MCA and frees up all the rendezvoused cpus and
      releases the ia64_mca_serialize lock.  One of the subsequent
      cpus going thought OS_MCA then gets the ia64_mca_serialize
      lock, waits another 5 seconds and then complains that none of
      the other cpus have rendezvoused.
      
      This patch allows multiple CPUs to gracefully go through OS_MCA.
      
      The first CPU into ia64_mca_handler() grabs a mca_count lock.
      Subsequent CPUs into ia64_mca_handler() are added to a list of cpus
      that need to go through OS_MCA (a bit set in mca_cpu), and report
      in as rendezvoused, and but spin waiting their turn.
      
      The first CPU sees everyone rendezvous, handles his MCA, wakes up
      one of the other CPUs waiting to process their MCA (by clearing
      one mca_cpu bit), and then waits for the other cpus to complete
      their MCA handling.  The next CPU handles his MCA and the process
      repeats until all the CPUs have handled their MCA.  When the last
      CPU has handled it's MCA, it sets monarch_cpu to -1, releasing all
      the CPUs.
      
      In testing this works more reliably and faster.
      
      Thanks to Keith Owens for suggesting numerous improvements
      to this code.
      Signed-off-by: NRuss Anderson <rja@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      1612b18c
    • J
      [IA64] silence GCC ia64 unused variable warnings · 256a7e09
      Jes Sorensen 提交于
      Tell GCC to stop spewing out unnecessary warnings for unused variables
      passed to functions as pointers for ia64 files.
      Signed-off-by: NJes Sorensen <jes@sgi.com>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      256a7e09
  4. 10 7月, 2007 3 次提交
    • C
      [IA64] Stop bit for brl instruction · c6255e98
      Christian Kandeler 提交于
      SDM says that brl instruction must be followed by a stop bit.
      Fix instance in BRL_COND_FSYS_BUBBLE_DOWN where it isn't.
      Signed-off-by: NChristian Kandeler <christian.kandeler@hob.de>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      c6255e98
    • T
      [IA64] Don't set psr.ic and psr.i simultaneously · 83ce6ef8
      Tony Luck 提交于
      It's not a good idea to use "ssm psr.ic | psr.i" to simultaneously
      enable interrupts and interrupt state collection, the two bits can
      take effect asynchronously, so it is possible for an interrupt to
      be serviced while psr.ic is still zero.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      83ce6ef8
    • I
      sched: zap the migration init / cache-hot balancing code · 0437e109
      Ingo Molnar 提交于
      the SMP load-balancer uses the boot-time migration-cost estimation
      code to attempt to improve the quality of balancing. The reason for
      this code is that the discrete priority queues do not preserve
      the order of scheduling accurately, so the load-balancer skips
      tasks that were running on a CPU 'recently'.
      
      this code is fundamental fragile: the boot-time migration cost detector
      doesnt really work on systems that had large L3 caches, it caused boot
      delays on large systems and the whole cache-hot concept made the
      balancing code pretty undeterministic as well.
      
      (and hey, i wrote most of it, so i can say it out loud that it sucks ;-)
      
      under CFS the same purpose of cache affinity can be achieved without
      any special cache-hot special-case: tasks are sorted in the 'timeline'
      tree and the SMP balancer picks tasks from the left side of the
      tree, thus the most cache-cold task is balanced automatically.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0437e109
  5. 27 6月, 2007 2 次提交
  6. 25 5月, 2007 2 次提交
  7. 24 5月, 2007 1 次提交
  8. 23 5月, 2007 2 次提交
  9. 19 5月, 2007 2 次提交
  10. 17 5月, 2007 1 次提交
  11. 16 5月, 2007 1 次提交
  12. 15 5月, 2007 3 次提交
  13. 12 5月, 2007 3 次提交
  14. 11 5月, 2007 6 次提交
  15. 10 5月, 2007 3 次提交
    • A
      [IA64] sa_interrupt is deprecated · 5329571b
      akpm@linux-foundation.org 提交于
      Seems more than just deprecated, we can't build using SA_INTERUPT.
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      5329571b
    • R
      rename thread_info to stack · f7e4217b
      Roman Zippel 提交于
      This finally renames the thread_info field in task structure to stack, so that
      the assumptions about this field are gone and archs have more freedom about
      placing the thread_info structure.
      
      Nonbroken archs which have a proper thread pointer can do the access to both
      current thread and task structure via a single pointer.
      
      It'll allow for a few more cleanups of the fork code, from which e.g.  ia64
      could benefit.
      Signed-off-by: NRoman Zippel <zippel@linux-m68k.org>
      [akpm@linux-foundation.org: build fix]
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Ian Molton <spyro@f2s.com>
      Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Hirokazu Takata <takata@linux-m32r.org>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Roman Zippel <zippel@linux-m68k.org>
      Cc: Greg Ungerer <gerg@uclinux.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
      Cc: Richard Curnow <rc@rc0.org.uk>
      Cc: William Lee Irwin III <wli@holomorphy.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
      Cc: Miles Bader <uclinux-v850@lsi.nec.co.jp>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Chris Zankel <chris@zankel.net>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f7e4217b
    • R
      Add suspend-related notifications for CPU hotplug · 8bb78442
      Rafael J. Wysocki 提交于
      Since nonboot CPUs are now disabled after tasks and devices have been
      frozen and the CPU hotplug infrastructure is used for this purpose, we need
      special CPU hotplug notifications that will help the CPU-hotplug-aware
      subsystems distinguish normal CPU hotplug events from CPU hotplug events
      related to a system-wide suspend or resume operation in progress.  This
      patch introduces such notifications and causes them to be used during
      suspend and resume transitions.  It also changes all of the
      CPU-hotplug-aware subsystems to take these notifications into consideration
      (for now they are handled in the same way as the corresponding "normal"
      ones).
      
      [oleg@tv-sign.ru: cleanups]
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Cc: Gautham R Shenoy <ego@in.ibm.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Signed-off-by: NOleg Nesterov <oleg@tv-sign.ru>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      8bb78442
  16. 09 5月, 2007 2 次提交