1. 08 8月, 2017 1 次提交
  2. 06 7月, 2017 2 次提交
  3. 29 5月, 2017 1 次提交
  4. 04 5月, 2017 1 次提交
  5. 12 4月, 2017 2 次提交
  6. 11 4月, 2017 1 次提交
  7. 23 3月, 2017 1 次提交
  8. 03 3月, 2017 1 次提交
  9. 02 3月, 2017 1 次提交
  10. 27 2月, 2017 1 次提交
  11. 02 2月, 2017 1 次提交
    • M
      drm/i915: Fix POWER_DOMAIN_AUDIO refcounting. · 37255d8d
      Maarten Lankhorst 提交于
      If the crtc was brought up with audio before the driver loads,
      then crtc_disable will remove a refcount to audio that doesn't exist
      before.
      
      Fortunately we already set power domains on readout, so we can just add
      the power domain handling to get_crtc_power_domains, which will update
      the power domains correctly in all cases.
      
      This was found when testing module reload on CI with the crtc enabled,
      which resulted in the following warn after module reload + modeset:
      
      [   24.197041] ------------[ cut here ]------------
      [   24.197075] WARNING: CPU: 0 PID: 99 at drivers/gpu/drm/i915/intel_runtime_pm.c:1790 intel_display_power_put+0x134/0x140 [i915]
      [   24.197076] Use count on domain AUDIO is already zero
      [   24.197098] CPU: 0 PID: 99 Comm: kworker/u8:2 Not tainted 4.9.0-CI-Trybot_393+ #1
      [   24.197099] Hardware name:                  /NUC6i5SYB, BIOS SYSKLi35.86A.0042.2016.0409.1246 04/09/2016
      [   24.197102] Workqueue: events_unbound async_run_entry_fn
      [   24.197105]  ffffc900003c7688 ffffffff81435b35 ffffc900003c76d8 0000000000000000
      [   24.197107]  ffffc900003c76c8 ffffffff8107e4d6 000006fe5dc36f28 ffff88025dc30054
      [   24.197109]  ffff88025dc36f28 ffff88025dc30000 ffff88025dc30000 0000000000000015
      [   24.197110] Call Trace:
      [   24.197113]  [<ffffffff81435b35>] dump_stack+0x67/0x92
      [   24.197116]  [<ffffffff8107e4d6>] __warn+0xc6/0xe0
      [   24.197118]  [<ffffffff8107e53a>] warn_slowpath_fmt+0x4a/0x50
      [   24.197149]  [<ffffffffa039b4b4>] intel_display_power_put+0x134/0x140 [i915]
      [   24.197187]  [<ffffffffa04217dd>] intel_disable_ddi+0x4d/0x80 [i915]
      [   24.197223]  [<ffffffffa03f388f>] intel_encoders_disable.isra.74+0x7f/0x90 [i915]
      [   24.197257]  [<ffffffffa03f6c05>] haswell_crtc_disable+0x55/0x170 [i915]
      [   24.197292]  [<ffffffffa03fec88>] intel_atomic_commit_tail+0x108/0xfd0 [i915]
      [   24.197295]  [<ffffffff810d47c6>] ? __lock_is_held+0x66/0x90
      [   24.197330]  [<ffffffffa03fff79>] intel_atomic_commit+0x429/0x560 [i915]
      [   24.197332]  [<ffffffff81570186>] ?drm_atomic_add_affected_connectors+0x56/0xf0
      [   24.197334]  [<ffffffff8156f726>] drm_atomic_commit+0x46/0x50
      [   24.197336]  [<ffffffff81553f87>] restore_fbdev_mode+0x147/0x270
      [   24.197337]  [<ffffffff81555bee>] drm_fb_helper_restore_fbdev_mode_unlocked+0x2e/0x70
      [   24.197339]  [<ffffffff81555aa8>] drm_fb_helper_set_par+0x28/0x50
      [   24.197374]  [<ffffffffa041c7d3>] intel_fbdev_set_par+0x13/0x70 [i915]
      [   24.197376]  [<ffffffff8149e07a>] fbcon_init+0x57a/0x600
      [   24.197379]  [<ffffffff81514b71>] visual_init+0xd1/0x130
      [   24.197381]  [<ffffffff8151603c>] do_bind_con_driver+0x1bc/0x3a0
      [   24.197384]  [<ffffffff81516521>] do_take_over_console+0x111/0x180
      [   24.197386]  [<ffffffff8149e152>] do_fbcon_takeover+0x52/0xb0
      [   24.197387]  [<ffffffff814a12c3>] fbcon_event_notify+0x723/0x850
      [   24.197390]  [<ffffffff810a4830>] ?__blocking_notifier_call_chain+0x30/0x70
      [   24.197392]  [<ffffffff810a44a4>] notifier_call_chain+0x34/0xa0
      [   24.197394]  [<ffffffff810a4848>] __blocking_notifier_call_chain+0x48/0x70
      [   24.197397]  [<ffffffff810a4881>] blocking_notifier_call_chain+0x11/0x20
      [   24.197398]  [<ffffffff814a4556>] fb_notifier_call_chain+0x16/0x20
      [   24.197400]  [<ffffffff814a678c>] register_framebuffer+0x24c/0x330
      [   24.197402]  [<ffffffff815558d9>] drm_fb_helper_initial_config+0x219/0x3c0
      [   24.197436]  [<ffffffffa041d373>] intel_fbdev_initial_config+0x13/0x30 [i915]
      [   24.197438]  [<ffffffff810a5d44>] async_run_entry_fn+0x34/0x140
      [   24.197440]  [<ffffffff8109c26c>] process_one_work+0x1ec/0x6b0
      [   24.197442]  [<ffffffff8109c1e6>] ? process_one_work+0x166/0x6b0
      [   24.197445]  [<ffffffff8109c779>] worker_thread+0x49/0x490
      [   24.197447]  [<ffffffff8109c730>] ? process_one_work+0x6b0/0x6b0
      [   24.197448]  [<ffffffff810a2a9b>] kthread+0xeb/0x110
      [   24.197451]  [<ffffffff810a29b0>] ? kthread_park+0x60/0x60
      [   24.197453]  [<ffffffff818241a7>] ret_from_fork+0x27/0x40
      [   24.197476] ---[ end trace bda64b683b8e8162 ]---
      Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1481812185-19098-3-git-send-email-maarten.lankhorst@linux.intel.comReviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      37255d8d
  12. 26 1月, 2017 1 次提交
    • M
      drm/i915: Add support for DP Video pattern compliance tests · 611032bf
      Manasi Navare 提交于
      The intel_dp_autotest_video_pattern() function gets invoked through the
      compliance test handler on a HPD short pulse if the test type is
      set to DP_TEST_VIDEO_PATTERN. This performs the DPCD registers
      reads to read the requested test pattern, video pattern resolution,
      frame rate and bits per color value. The results of this analysis
      are handed off to userspace so that the userspace app can set the
      video pattern mode appropriately for the test result/response.
      When the  test is requested with specific BPC value, we read the BPC
      value from the DPCD register. If this BPC value in intel_dp structure
      has a non-zero value and we're on a display port connector, then we use
      the value to calculate the bpp for the pipe. Also in this case if its
      a 18bpp video pattern request, then we force the dithering on pipe to be
      disabled since it causes CRC mismatches.
      
      The compliance_test_active flag is set at the end of the individual
      test handling functions. This is so that the kernel-side operations
      can be completed without the risk of interruption from the userspace
      app that is polling on that flag.
      
      v5:
      * Remove test_result variable
      * Populate the compliance test data at the end of the function (Jani Nikula)
      v4:
      *Return TEST_NAK on read failures and invalid values (Jani Nikula)
      * Address CRC mismatch errors
      v3:
      * Use the updated properly shifted bit definitions (Jani Nikula)
      * Force dithering to be disabled on 18bpp compliance
      test request (Manasi Navare)
      v2:
      * Updated the DPCD Register reads based on proper defines in header (Jani Nikula)
      * Squahsed the patch that forced the pipe bpp to compliance test bpp (Jani Nikula)
      Signed-off-by: NManasi Navare <manasi.d.navare@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1485274909-17470-1-git-send-email-manasi.d.navare@intel.com
      611032bf
  13. 25 1月, 2017 1 次提交
  14. 05 12月, 2016 1 次提交
  15. 29 11月, 2016 1 次提交
  16. 15 11月, 2016 1 次提交
  17. 29 9月, 2016 1 次提交
  18. 22 9月, 2016 2 次提交
  19. 08 9月, 2016 2 次提交
  20. 23 8月, 2016 4 次提交
  21. 06 8月, 2016 1 次提交
  22. 04 8月, 2016 1 次提交
  23. 02 8月, 2016 1 次提交
  24. 07 7月, 2016 1 次提交
  25. 04 7月, 2016 1 次提交
  26. 30 6月, 2016 1 次提交
  27. 24 6月, 2016 2 次提交
  28. 19 6月, 2016 1 次提交
  29. 30 5月, 2016 1 次提交
  30. 05 5月, 2016 1 次提交
  31. 04 5月, 2016 2 次提交