1. 02 9月, 2008 2 次提交
  2. 31 8月, 2008 2 次提交
  3. 30 8月, 2008 1 次提交
  4. 08 8月, 2008 1 次提交
  5. 24 4月, 2008 1 次提交
  6. 22 1月, 2008 1 次提交
    • S
      [SPARC64]: Fix of section mismatch warnings. · a1f35ba3
      Sam Ravnborg 提交于
      Fix following Section mismatch warning in sparc64:
      
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x13dec): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'psycho_scan_bus' and 'psycho_pbm_init')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x14b58): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'sabre_scan_bus' and 'sabre_init')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x15ea4): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'schizo_scan_bus' and 'schizo_pbm_init')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x17780): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'pci_sun4v_scan_bus' and 'pci_sun4v_get_head')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x17d5c): Section mismatch: reference to .devinit.text:pci_scan_one_pbm (between 'pci_fire_scan_bus' and 'pci_fire_get_head')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x23860): Section mismatch: reference to .devinit.text:vio_dev_release (between 'vio_create_one' and 'vio_add')
      WARNING: arch/sparc64/kernel/built-in.o(.text+0x23868): Section mismatch: reference to .devinit.text:vio_dev_release (between 'vio_create_one' and 'vio_add')
      
      The pci_* were all missing __init annotations.
      For the vio.c case it was a function with a wrong annotation which was removed.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a1f35ba3
  7. 21 12月, 2007 1 次提交
  8. 14 10月, 2007 1 次提交
  9. 30 7月, 2007 1 次提交
    • D
      [SPARC64]: Fix conflicts in SBUS/PCI/EBUS/ISA DMA handling. · ad7ad57c
      David S. Miller 提交于
      Fully unify all of the DMA ops so that subordinate bus types to
      the DMA operation providers (such as ebus, isa, of_device) can
      work transparently.
      
      Basically, we just make sure that for every system device we
      create, the dev->archdata 'iommu' and 'stc' fields are filled
      in.
      
      Then we have two platform variants of the DMA ops, one for SUN4U which
      actually programs the real hardware, and one for SUN4V which makes
      hypervisor calls.
      
      This also fixes the crashes in parport_pc on sparc64, reported by
      Meelis Roos.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ad7ad57c
  10. 09 5月, 2007 7 次提交
  11. 27 4月, 2007 1 次提交
  12. 26 4月, 2007 10 次提交
  13. 09 10月, 2006 1 次提交
  14. 03 7月, 2006 1 次提交
  15. 30 6月, 2006 1 次提交
    • D
      [SPARC64]: of_device layer IRQ resolution · 2b1e5978
      David S. Miller 提交于
      Do IRQ determination generically by parsing the PROM properties,
      and using IRQ controller drivers for final resolution.
      
      One immediate positive effect is that all of the IRQ frobbing
      in the EBUS, ISA, and PCI controller layers has been eliminated.
      We just look up the of_device and use the properly computed
      value.
      
      The PCI controller irq_build() routines are gone and no longer
      used.  Unfortunately sbus_build_irq() has to remain as there is
      a direct reference to this in the sunzilog driver.  That can be
      killed off once the sparc32 side of this is written and the
      sunzilog driver is transformed into an "of" bus driver.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2b1e5978
  16. 24 6月, 2006 2 次提交
  17. 20 6月, 2006 3 次提交
    • D
      [SPARC64]: Move over to GENERIC_HARDIRQS. · e18e2a00
      David S. Miller 提交于
      This is the long overdue conversion of sparc64 over to
      the generic IRQ layer.
      
      The kernel image is slightly larger, but the BSS is ~60K
      smaller due to the reduced size of struct ino_bucket.
      
      A lot of IRQ implementation details, including ino_bucket,
      were moved out of asm-sparc64/irq.h and are now private to
      arch/sparc64/kernel/irq.c, and most of the code in irq.c
      totally disappeared.
      
      One thing that's different at the moment is IRQ distribution,
      we do it at enable_irq() time.  If the cpu mask is ALL then
      we round-robin using a global rotating cpu counter, else
      we pick the first cpu in the mask to support single cpu
      targetting.  This is similar to what powerpc's XICS IRQ
      support code does.
      
      This works fine on my UP SB1000, and the SMP build goes
      fine and runs on that machine, but lots of testing on
      different setups is needed.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e18e2a00
    • D
      [SPARC64]: Virtualize IRQ numbers. · 8047e247
      David S. Miller 提交于
      Inspired by PowerPC XICS interrupt support code.
      
      All IRQs are virtualized in order to keep NR_IRQS from needing
      to be too large.  Interrupts on sparc64 are arbitrary 11-bit
      values, but we don't need to define NR_IRQS to 2048 if we
      virtualize the IRQs.
      
      As PCI and SBUS controller drivers build device IRQs, we divy
      out virtual IRQ numbers incrementally starting at 1.  Zero is
      a special virtual IRQ used for the timer interrupt.
      
      So device drivers all see virtual IRQs, and all the normal
      interfaces such as request_irq(), enable_irq(), etc. translate
      that into a real IRQ number in order to configure the IRQ.
      
      At this point knowledge of the struct ino_bucket is almost
      entirely contained within arch/sparc64/kernel/irq.c  There are
      a few small bits in the PCI controller drivers that need to
      be swept away before we can remove ino_bucket's definition
      out of asm-sparc64/irq.h and privately into kernel/irq.c
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8047e247
    • D
      [SPARC64]: Kill ino_bucket->pil · 37cdcd9e
      David S. Miller 提交于
      And reuse that struct member for virt_irq, which will
      be used in future changesets for the implementation of
      mapping between real and virtual IRQ numbers.
      
      This nicely kills off a ton of SBUS and PCI controller
      PIL assignment code which is no longer necessary.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      37cdcd9e
  18. 20 3月, 2006 2 次提交
  19. 14 10月, 2005 1 次提交