1. 09 11月, 2009 2 次提交
  2. 02 11月, 2009 3 次提交
    • S
      x86: Use EOI register in io-apic on intel platforms · b3ec0a37
      Suresh Siddha 提交于
      IO-APIC's in intel chipsets support EOI register starting from
      IO-APIC version 2. Use that when ever we need to clear the
      IO-APIC RTE's RemoteIRR bit explicitly.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NGary Hade <garyhade@us.ibm.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      LKML-Reference: <20091026230001.947855317@sbs-t61.sc.intel.com>
      [ Marked use_eio_reg as __read_mostly, fixed small details ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b3ec0a37
    • S
      x86: Force irq complete move during cpu offline · a5e74b84
      Suresh Siddha 提交于
      When a cpu goes offline, fixup_irqs() try to move irq's
      currently destined to the offline cpu to a new cpu. But this
      attempt will fail if the irq is recently moved to this cpu and
      the irq still hasn't arrived at this cpu (for non intr-remapping
      platforms this is when we free the vector allocation at the
      previous destination) that is about to go offline.
      
      This will endup with the interrupt subsystem still pointing the
      irq to the offline cpu, causing that irq to not work any more.
      
      Fix this by forcing the irq to complete its move (its been a
      long time we moved the irq to this cpu which we are offlining
      now) and then move this irq to a new cpu before this cpu goes
      offline.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NGary Hade <garyhade@us.ibm.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      LKML-Reference: <20091026230001.848830905@sbs-t61.sc.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a5e74b84
    • S
      x86: Remove move_cleanup_count from irq_cfg · 23359a88
      Suresh Siddha 提交于
      move_cleanup_count for each irq in irq_cfg is keeping track of
      the total number of cpus that need to free the corresponding
      vectors associated with the irq which has now been migrated to
      new destination. As long as this move_cleanup_count is non-zero
      (i.e., as long as we have n't freed the vector allocations on
      the old destinations) we were preventing the irq's further
      migration.
      
      This cleanup count is unnecessary and it is enough to not allow
      the irq migration till we send the cleanup vector to the
      previous irq destination, for which we already have irq_cfg's
      move_in_progress.  All we need to make sure is that we free the
      vector at the old desintation but we don't need to wait till
      that gets freed.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Acked-by: NGary Hade <garyhade@us.ibm.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      LKML-Reference: <20091026230001.752968906@sbs-t61.sc.intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      23359a88
  3. 14 10月, 2009 3 次提交
  4. 24 9月, 2009 1 次提交
  5. 21 9月, 2009 1 次提交
  6. 01 9月, 2009 1 次提交
    • T
      x86: Distangle ioapic and i8259 · bc07844a
      Thomas Gleixner 提交于
      The proposed Moorestown support patches use an extra feature flag
      mechanism to make the ioapic work w/o an i8259. There is a much
      simpler solution.
      
      Most i8259 specific functions are already called dependend on the irq
      number less than NR_IRQS_LEGACY. Replacing that constant by a
      read_mostly variable which can be set to 0 by the platform setup code
      allows us to achieve the same without any special feature flags.
      
      That trivial change allows us to proceed with MRST w/o doing a full
      blown overhaul of the ioapic code which would delay MRST unduly.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      bc07844a
  7. 29 8月, 2009 1 次提交
    • F
      ACPI, x86: expose some IO-APIC routines when CONFIG_ACPI=n · 2a4ab640
      Feng Tang 提交于
      Some IO-APIC routines are ACPI specific now, but need to
      be exposed when CONFIG_ACPI=n for the benefit of SFI.
      
      Remove #ifdef ACPI around these routines:
      
      io_apic_get_unique_id(int ioapic, int apic_id);
      io_apic_get_version(int ioapic);
      io_apic_get_redir_entries(int ioapic);
      
      Move these routines from ACPI-specific boot.c to io_apic.c:
      
      uniq_ioapic_id(u8 id)
      mp_find_ioapic()
      mp_find_ioapic_pin()
      mp_register_ioapic()
      
      Also, since uniq_ioapic_id() is now no longer static,
      re-name it to io_apic_unique_id() for consistency
      with the other public io_apic routines.
      
      For simplicity, do not #ifdef the resulting code ACPI || SFI,
      thought that could be done in the future if it is important
      to optimize the !ACPI !SFI IO-APIC x86 kernel for size.
      Signed-off-by: NFeng Tang <feng.tang@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      Cc: x86@kernel.org
      2a4ab640
  8. 27 8月, 2009 1 次提交
  9. 26 8月, 2009 1 次提交
  10. 08 8月, 2009 1 次提交
  11. 05 8月, 2009 2 次提交
  12. 04 8月, 2009 1 次提交
    • J
      x86, UV: Complete IRQ interrupt migration in arch_enable_uv_irq() · 2a5ef416
      Jack Steiner 提交于
      In uv_setup_irq(), the call to create_irq() initially assigns
      IRQ vectors to cpu 0. The subsequent call to
      assign_irq_vector() in arch_enable_uv_irq() migrates the IRQ to
      another cpu and frees the cpu 0 vector - at least it will be
      freed as soon as the "IRQ move" completes.
      
      arch_enable_uv_irq() needs to send a cleanup IPI to complete
      the IRQ move. Otherwise, assignment of GRU interrupts on large
      systems (>200 cpus) will exhaust the cpu 0 interrupt vectors
      and initialization of the GRU driver will fail.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      LKML-Reference: <20090720142840.GA8885@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      2a5ef416
  13. 03 8月, 2009 1 次提交
  14. 15 7月, 2009 11 次提交
  15. 11 7月, 2009 1 次提交
    • Y
      x86/pci: insert ioapic resource before assigning unassigned resources · 857fdc53
      Yinghai Lu 提交于
      Stephen reported that his DL585 G2 needed noapic after 2.6.22 (?)
      
      Dann bisected it down to:
        commit 30a18d6c
        Date:   Tue Feb 19 03:21:20 2008 -0800
      
            x86: multi pci root bus with different io resource range, on
            64-bit
      
      It turns out that:
        1. that AMD-based systems have two HT chains.
        2. BIOS doesn't allocate resources for BAR 6 of devices under 8132 etc
        3. that multi-peer-root patch will try to split root resources to peer
           root resources according to PCI conf of NB
        4. PCI core assigns unassigned resources, but they overlap with BARs
           that are used by ioapic addr of io4 and 8132.
      
      The reason: at that point ioapic address are not inserted yet.  Solution
      is to insert ioapic resources into the tree a bit earlier.
      Reported-by: NStephen Frost <sfrost@snowman.net>
      Reported-and-Tested-by: Ndann frazier <dannf@hp.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: stable@kernel.org
      Signed-off-by: NJesse Barnes <jbarnes@jbarnes-g45.(none)>
      857fdc53
  16. 09 7月, 2009 1 次提交
  17. 02 7月, 2009 1 次提交
    • I
      x86: Fix printk call in print_local_apic() · 251e1e44
      Ingo Molnar 提交于
      Instead of this:
      
      [   75.690022] <7>printing local APIC contents on CPU#0/0:
      [   75.704406] ... APIC ID:      00000000 (0)
      [   75.707905] ... APIC VERSION: 00060015
      [   75.722551] ... APIC TASKPRI: 00000000 (00)
      [   75.725473] ... APIC PROCPRI: 00000000
      [   75.728592] ... APIC LDR: 00000001
      [   75.742137] ... APIC SPIV: 000001ff
      [   75.744101] ... APIC ISR field:
      [   75.746648] 0123456789abcdef0123456789abcdef
      [   75.746649] <7>00000000000000000000000000000000
      
      Improve the code to be saner and simpler and just print out
      the bitfield in a single line using hexa values - not as a
      (rather pointless) binary bitfield.
      
      Partially reused Linus's initial fix for this.
      Reported-and-Tested-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <4A4C43BC.90506@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      251e1e44
  18. 24 6月, 2009 1 次提交
    • W
      Intel-IOMMU, intr-remap: source-id checking · f007e99c
      Weidong Han 提交于
      To support domain-isolation usages, the platform hardware must be
      capable of uniquely identifying the requestor (source-id) for each
      interrupt message. Without source-id checking for interrupt remapping
      , a rouge guest/VM with assigned devices can launch interrupt attacks
      to bring down anothe guest/VM or the VMM itself.
      
      This patch adds source-id checking for interrupt remapping, and then
      really isolates interrupts for guests/VMs with assigned devices.
      
      Because PCI subsystem is not initialized yet when set up IOAPIC
      entries, use read_pci_config_byte to access PCI config space directly.
      Signed-off-by: NWeidong Han <weidong.han@intel.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      f007e99c
  19. 18 6月, 2009 1 次提交
    • C
      x86, ioapic: Don't call disconnect_bsp_APIC if no APIC present · 3f4c3955
      Cyrill Gorcunov 提交于
      Vegard Nossum reported:
      
      [  503.576724] ACPI: Preparing to enter system sleep state S5
      [  503.710857] Disabling non-boot CPUs ...
      [  503.716853] Power down.
      [  503.717770] ------------[ cut here ]------------
      [  503.717770] WARNING: at arch/x86/kernel/apic/apic.c:249 native_apic_write_du)
      [  503.717770] Hardware name: OptiPlex GX100
      [  503.717770] Modules linked in:
      [  503.717770] Pid: 2136, comm: halt Not tainted 2.6.30 #443
      [  503.717770] Call Trace:
      [  503.717770]  [<c154d327>] ? printk+0x18/0x1a
      [  503.717770]  [<c1017358>] ? native_apic_write_dummy+0x38/0x50
      [  503.717770]  [<c10360fc>] warn_slowpath_common+0x6c/0xc0
      [  503.717770]  [<c1017358>] ? native_apic_write_dummy+0x38/0x50
      [  503.717770]  [<c1036165>] warn_slowpath_null+0x15/0x20
      [  503.717770]  [<c1017358>] native_apic_write_dummy+0x38/0x50
      [  503.717770]  [<c1017173>] disconnect_bsp_APIC+0x63/0x100
      [  503.717770]  [<c1019e48>] disable_IO_APIC+0xb8/0xc0
      [  503.717770]  [<c1214231>] ? acpi_power_off+0x0/0x29
      [  503.717770]  [<c1015e55>] native_machine_shutdown+0x65/0x80
      [  503.717770]  [<c1015c36>] native_machine_power_off+0x26/0x30
      [  503.717770]  [<c1015c49>] machine_power_off+0x9/0x10
      [  503.717770]  [<c1046596>] kernel_power_off+0x36/0x40
      [  503.717770]  [<c104680d>] sys_reboot+0xfd/0x1f0
      [  503.717770]  [<c109daa0>] ? perf_swcounter_event+0xb0/0x130
      [  503.717770]  [<c109db7d>] ? perf_counter_task_sched_out+0x5d/0x120
      [  503.717770]  [<c102dfc6>] ? finish_task_switch+0x56/0xd0
      [  503.717770]  [<c154da1e>] ? schedule+0x49e/0xb40
      [  503.717770]  [<c10444b0>] ? sys_kill+0x70/0x160
      [  503.717770]  [<c119d9db>] ? selinux_file_ioctl+0x3b/0x50
      [  503.717770]  [<c10dd443>] ? sys_ioctl+0x63/0x70
      [  503.717770]  [<c1003024>] sysenter_do_call+0x12/0x22
      [  503.717770] ---[ end trace 8157b5d0ed378f15 ]---
      
      |
      | That's including this commit:
      |
      | commit 103428e5
      |Author: Cyrill Gorcunov <gorcunov@openvz.org>
      |Date:   Sun Jun 7 16:48:40 2009 +0400
      |
      |    x86, apic: Fix dummy apic read operation together with broken MP handling
      |
      
      If we have apic disabled we don't even switch to APIC mode and do not
      calling for connect_bsp_APIC. Though on SMP compiled kernel the
      native_machine_shutdown does try to write the apic register anyway.
      
      Fix it with explicit check if we really should touch apic registers.
      Reported-by: NVegard Nossum <vegard.nossum@gmail.com>
      Signed-off-by: NCyrill Gorcunov <gorcunov@openvz.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      LKML-Reference: <20090617181322.GG10822@lenovo>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3f4c3955
  20. 17 6月, 2009 2 次提交
  21. 12 6月, 2009 3 次提交