When SPI wake up from OFF mode, CS is in the wrong state: force it to the
inactive state.

During the system life, I monitored the CS behavior using a oscilloscope.
I also activated debug in omap2_mcspi, so I saw when driver disable the clocks
and restore context when device is not used.Each time the CS was in the correct
state.  It was only when system was put suspend to ram with off-mode activated
that on resume the CS was in wrong state( ie activated).

Changelog:
* Change from v1 to v2:
  - Rebase on linus/master (after 2.6.37-rc1)
  - Do some clean-up and fix indentation on both patches
  - Add more explanations for patch 2

* Change from v2 to v3:
  - Use directly resume function of spi_master instead of using function
  - from spi_device as Grant Likely pointed it out.
  - Force this transition explicitly for each CS used by a device.

* Change from v3 to v4:
  - Patch clean-up according to Kevin Hilman and checkpatch.
  - Now force CS to be in inactive state only if it was inactive when it was
    suspended.

* Change from v4 to v5:
  - Rebase on linus/master (after 2.6.37-rc3)
  - Collapse some lines as pointed by Grant Likely
  - Fix a spelling

* Change from v5 to v6:
  - Rebase on linus/master (after 2.6.37-rc7)
  - Use CONFIG_SUSPEND instead of CONFIG_PM
  - Didn't use legacy PM methods anymore. Instead, add a struct dev_pm_ops and
    add the resume method there.
  - Fix multi-line comment style

* Change from v6 to v7:
  - Rebase on linus/master (after 2.6.37-rc8)
  - Drop an extra line
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Or else we can't operate on the right address when the trans length
is greater than 65535.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the
amount of data in the receive FIFO, so read the SPIRF byte by byte when
the data in receive FIFO is less than 4 bytes.

On Simics, when read N bytes that exceed the amount of data in receive
FIFO, we can't read the data out, that is we can't clear the rx FIFO,
then the CPU will loop on the espi rx interrupt.
Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This was fixed by David Lamparter in v2.6.36-rc5 34860089 ("spi: free
children in spi_unregister_master, not siblings") and broken again in
v2.6.37-rc1~2^2~4 during the merge of 2b9603a0 ("spi: enable
spi_board_info to be registered after spi_master").
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDavid Lamparter <equinox@diac24.net>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

There is a possibility that the last word of a transaction will be lost
if data is not ready.  Re-read in poll_transfer() to solve this issue
when poll_mode is enabled.

Verified on SPI touch screen device.
Signed-off-by: NMajor Lee <major_lee@wistron.com>
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

passing argument 2 of 'dma_map_single' discards qualifiers from pointer target type
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

avoids derefencing an uninitialized pointer

Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701
Signed-off-by: NErik Gilling <konkers@android.com>

This patch removes convention of passing a static string as a
parameter to another static string.  The convention is intended to
reduce text usage by sharing the common bits of the string, but the
implementation is inherently fragile (a change to one format string
but not the other will nullify any possible advantage), it isn't
necessarily a net win depending on what this compiler does, and it
it reduces code readability.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
[grant.likely@secretlab.ca: removed dev_dbg->dev_err hunk]
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The gpiolib code does not allow people to do gpio_request() on a GPIO
once it has already been requested.  So make sure we only request the
pin on the first setup of a SPI device.  Otherwise, if you attempts to
reconfigure a SPI device on the fly (like change bit sizes), the setup
function incorrectly fails.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis.  Once the error interrupt is enabled
for one peripheral, it is automatically enabled for all.

So in the Blackfin on-chip SPI driver, we need to clear out
these known errors in the data interrupt once we've successfully
finished processing all of the pending data.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Currently spi_register_board_info() has to be called before its related
spi_master be registered, otherwise these board info will be just ignored.

This patch will remove this order limit, it adds a global spi master list
like the existing global board info listr. Whenever a board info or a
spi_master is registered, the spi master list or board info list
will be scanned, and a new spi device will be created if there is a
master-board info match.
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

v2 changes:
  from Thierry Reding:
    * add "select TEGRA_SYSTEM_DMA" to Kconfig
  from Grant Likely:
    * add oneline description to header
    * inline references to DRIVER_NAME
    * inline references to BUSY_TIMEOUT
    * open coded bytes_per_word()
    * spi_readl/writel -> spi_tegra_readl/writel
    * move transfer validation to spi_tegra_transfer
    * don't request_mem_region iomem as platform bus does that for us
    * __exit -> __devexit

v3 changes:
  from Russell King:
    * put request_mem_region back int
  from Grant Likely:
    * remove #undef DEBUG
    * add SLINK_ to register bit defines
    * remove unused bytes_per_word
    * make spi_tegra_readl/writel static linine
    * various refactoring for clarity
    * mark err if BSY bit is not cleared after 1000 retries
    * move spinlock to protect setting of RDY bit
    * subsys_initcall -> module_init

v3 changes:
  from Grant Likely:
    * update spi_tegra to use PTR_ERRless dma API

v4 changes:
  from Grant Likely:
    * remove empty spi_tegra_cleanup fucntion
    * allow device ids of -1
Signed-off-by: NErik Gilling <konkers@android.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Russell King <linux@arm.linux.org.uk>

spi: tegra: cleanups from upstream review

Change-Id: Icecf7e64efcb39de072a15234ba1faa4bad40d25
Signed-off-by: NErik Gilling <konkers@android.com>

In case of TX only with DMA, the driver assumes that the data
has been transferred once DMA callback in invoked. However,
SPI's shift register may still contain data. Thus, the driver
is supposed to verify that the register is empty and the end of
the SPI transfer has been reached.
Signed-off-by: NIlkka Koskinen <ilkka.koskinen@nokia.com>
Tested-by: NTuomas Katila <ext-tuomas.2.katila@nokia.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

In the TX_ONLY transfer, the SPI controller also receives data
simultaneously and saves them in the rx register. After the TX_ONLY
transfer, the rx register will hold the random data received during
the last tx transaction.

If the direct following transfer is RX_ONLY, this random data has the
possibility to affect this transfer like this:
  When the SPI controller is changed from TX_ONLY to RX_ONLY,
  the random data makes the rx register full immediately and
  triggers a dummy write automatically(in SPI RX_ONLY transfers,
  we need a dummy write to trigger the first transaction).

  So the first data received in the RX_ONLY transfer will be that
  random data instead of something meaningful.

We can avoid this by inserting a Disable/Re-enable toggle of the
channel after the TX_ONLY transfer, since it purges the rx register.
Signed-off-by: NJason Wang <jason77.wang@gmail.com>
Tested-by: NGrazvydas Ignotas <notasas@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Some systems using this bus sometimes have very basic devices on them
such as regulators.  So we need to be loaded even earlier in case the
devices are used by things such as early board init code.  Therefore
register in subsys_initcall().
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Currently, if the bits_per_word when doing a transfer is not 8bits, we
always treat it as 16bits when we should actually be returning an error.
Signed-off-by: NBob Liu <lliubbo@gmail.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When the hardware is controlling the CS, there are some SPI options
we are unable to support.  So issue a warning in the hopes that the
user will change to a SPI mode where we can support things sanely.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NRob Maris <maris.rob@vdi.de>
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NRob Maris <maris.rob@vdi.de>
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Who knows what people will try!
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly.  When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.
Reported-by: NAndy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This reduces duplication between the setup/transfer functions and keeps
values cached during setup from overriding values changed on a transfer
basis (like bits_per_word).
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Using disable_irq() on the IRQ whose handler we are currently executing in
can easily lead to a hang.  So use the nosync variant here.
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled.  So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

We can't rely on the SPI_CTL/SPI_FLG registers retaining their state when
suspending, so save/restore their entire values.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS.  This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS".  But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.

To make both work, we introduce an offset define.  This represents the
max number of hardware CS values that the SPI peripheral supports.  If
the CS is below this limit, we know we can use the hardware CS.  If it's
above, we treat it as a GPIO CS.  This keeps the CS unique as seen by
the common code and prevents conflicts.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This lets us push the short SPI MMR bit names out of the global namespace.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The driver that we based ours on uses a little extra memory behind the
normal driver state, but we don't.  So drop this useless bit of memory.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The current structure names are a bit confusing as to what they represent,
so use better names.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than having to look up the same 3 sets of functions at the same
time, just use an ops structure so we only need to set one pointer.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

No point in creating our own version of true/false defines when there is
already a standard stdbool available to us.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The chip ops should always be initialized, so having null fallback
functions are useless.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it.  So punt all of the dead code considering it
makes up ~10% of the code size.
Reported-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The CS helper functions were toggling both the Flag Enable and the Flag
Value bits, but the Flag Value bit is ignored if the corresponding Flag
Enable bit is cleared.  So under high speed transactions, the CS sometimes
would not toggle properly.

Since it makes no sense to toggle the Flag Enable bit dynamically when we
actually want to control the Flag Value, do this when setting up the device
and then only handle toggling of the CS value during runtime.
Signed-off-by: NBarry Song <barry.song@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The current behavior in PIO mode is to poll the SPI status registers which
can obviously lead to higher latencies when doing a lot of SPI traffic.
There is a SPI interrupt which can be used instead to signal individual
completion of transactions.
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>