The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a
high-throughput segment and a low-latency segment).  Fix our PLB register
definitions to cope with this, and add code to dump the status of both
segments when a machine check occurs.
Signed-off-by: NRoland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Cleanup PPC440 eval boards (bamboo, ebony, luan and ocotea) to better
support U-Boot as bootloader.
Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NMatt Porter <mporter@kernel.crashing.org>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Use idle_power4.S from ppc64 as we are not going to support
32 bit power4 in the merged tree.

Merge ppc64 traps.c into powerpc traps.c:
	use ppc64 versions of exception routine names
		(as they don't have StudlyCaps)
	make all the versions if die() have the same
		prototype
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!