delete obsolete device-type property, delete model property
(use compatible property instead), prepend "fsl," to Freescale
specific properties. Add nodes to device trees that are missing them,
and fix broken property values in other trees.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added DMA nodes for the elo/elo-plus DMA engines.

Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic so that
its the same as all the other boards.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Andrew Klossner pointed out the IO space size was in violation of
the alignment requirements for windows on the 85xx.  The size should
have been 1M (to match u-boot).
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec.  Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Removed clock-frequency, big-endian, and built-in props as they aren't
specified anywhere.  Also added compatible = "chrp,open-pic" in the
places it was missing.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added aliases nodes for kurobox, 83xx, 85xx, and 86xx platforms.
This included added labels and cell-index properties for serial and
pci nodes.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Removed address fields in ethernet nodes
* Removed #address-cells, #size-cells from gianfar nodes
* Added cell-index to gianfar and ucc ethernet nodes
* Added enet[0..3] labels
* Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio"
* Removed device_type = "mdio"

The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo
but it is now considered deprecated.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Removed device_type = "i2c"
* Added missing second I2C controller on MPC8548 CDS, MPC8544 DS
* Added #address-cells, #size-cells, and cell-index where missing
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added the P2P bridge present on the Arcadia base board and moved the VIA
Southbridge behind the bridge to reflect its actual position in the bus
organization. Added the RTC that's in the VIA Southbridge and expanded
the ranges array for the SOC node to allow proper address translation of
the RTC registers.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add 8548 CDS PCI express controller node and PCI-X device node. The current
dts file is suitable for 8548 Rev 2.0 board with Arcadia 3.1.

This kind of board combination is the most popular.

Used the following compatible properties:
	PCI	"fsl,mpc8540-pci"
	PCI-X:	"fsl,mpc8540-pcix"
	PCIe:	"fsl,mpc8548-pcie"
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The PHY is active-low on the MPC85xx CDS and the 8560 ADS just had
the wrong sense for the internal PCI and CPM interrupts.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

For the 83xx, 85xx, and 86xx device trees, add a "local-mac-address" property
to every Ethernet node that didn't have one.  Add a comment indicating that
the "address" and/or "mac-address" properties are deprecated in DTS files
and will be removed at a later time.  Change all MAC address properties to
have a zero MAC address value.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Begin with MPC8548 a new reset control register is added that asserts
HRESET_REQ to board logic.

This register is used for chip reset.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Adding memory-controller and l2-cache-controller entries to be used by EDAC
as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS.

Also fixed up the size of the PCI node on MPC8560 ADS.
Signed-off-by: NDave Jiang <djiang@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The #cpus property is unused and undocumented and is therefore
being removed.
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

* Fixed up top level compatible property for all boards
* Removed explicit linux,phandle usage. Use references and labels now
* Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added the mpc85xx family of dts files to the powerpc tree
Signed-off-by: NPaul Mackerras <paulus@samba.org>