Read the memory ranges behind the Broadcom CNB20LE host bridge out of the
hardware. This allows PCI hotplugging to work, since we know which memory
range to allocate PCI BAR's from.

The x86 PCI code automatically prefers the ACPI _CRS information when it is
available. In that case, this information is not used.
Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

Both ACPI and SFI firmwares will have MCFG space, but the error message
isn't valid on SFI, so don't print the message in that case.
Signed-off-by: NFeng Tang <feng.tang@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This patch adds additional LPC Controller DeviceIDs for the Intel Cougar
Point PCH.

The DeviceIDs are defined and referenced as a range of values, the same
way Ibex Peak was implemented.
Signed-off-by: NSeth Heasley <seth.heasley@intel.com>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

pci_config_lock must be a real spinlock in preempt-rt. Convert it to
raw_spinlock. No change for !RT kernels.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>

This fixes a regression of

	7d58289f (mx1: prefix SOC specific defines with MX1_ and deprecate old names)
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>

Signed-off-by: NMichal Simek <monstr@monstr.eu>

1. Remove CACHE_ALL_LOOP2 macro because it is identical to CACHE_ALL_LOOP
2. Change BUG_ON to WARN_ON
3. Remove end aligned from CACHE_LOOP_LIMITS.
C implementation do not need aligned end address and ASM code do aligned
in their macros
4. ASM optimized  CACHE_RANGE_LOOP_1/2 macros needs to get aligned end address.
Because end address is compound from start + size, end address is the first address
which is exclude.

Here is the corresponding code which describe it.
+       int align = ~(line_length - 1);
+       end = ((end & align) == end) ? end - line_length : end & align;

a) end is aligned:
it is necessary to subtruct line length because we don't want to work with
next cacheline
b) end address is not aligned:
Just align it to be ready for ASM code.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

PCI_DMA_FROMDEVICE should call invalidation not flushing.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Microblaze cacheline length is configurable and current cpu
uses two cacheline length 4 and 8.

We are taking conservative maximum value to be sure that cacheline
alignment is satisfied for all cases.

Here is the calculation for cacheline lenght 8  32bit=4Byte values
which is corresponding with SHIFT 5.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Show cache line length in /proc/cpuinfo.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Based on PowerPC patche 52142e75

PowerPC description:
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
that the kmalloc minimum alignment is set to the cache line size, to
avoid sharing cache lines between different objects, so that DMA to
one of the objects doesn't corrupt the other.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Copy & paste error.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

This patch fix consistent code which had problems with consistent_free
function.
I am not sure if we need to call flush_tlb_all after it but it keeps
tlbs synced.
I added noMMU and MMU version together.

Uncached shadow feature is not tested.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Based on af407c6d
and f41b1771Signed-off-by: NMichal Simek <monstr@monstr.eu>

Remove ancient macros which are here from Linux-2.4
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Current implementation doesn't handle dcache_line_length
correctly that's why is better to use generic memcpy.

Cache optimized function could be good way howto improve
performance but must be based on benchmarking not blind
function like this.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

As explained in commit 1c0fe6e3, we want to call the architecture independent
oom killer when getting an unexplained OOM from handle_mm_fault, rather than
simply killing current.

Cc: microblaze-uclinux@itee.uq.edu.au
Cc: Michal Simek <monstr@monstr.eu>
Cc: linux-arch@vger.kernel.org
Signed-off-by: NNick Piggin <npiggin@suse.de>
Acked-by: NDavid Rientjes <rientjes@google.com>
Acked-by: NMichal Simek <monstr@monstr.eu>

Fix divide exception message to say "divide by zero".
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Cc:	Michal Simek <monstr@monstr.eu>
Cc:	microblaze-uclinux@itee.uq.edu.au
Signed-off-by: NMichal Simek <monstr@monstr.eu>

It is necessary for several drivers.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

I found several function which we don't use that's why I am removing them.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Remove section mismatch - based on ppc aproach.

WARNING: vmlinux.o(.text+0x64834): Section mismatch in reference
from the function __pte_alloc_kernel() to the function .init.text:early_get_page()
The function __pte_alloc_kernel() references
the function __init early_get_page().
This is often because __pte_alloc_kernel lacks a __init
annotation or the annotation of early_get_page is wrong.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

_start is located in .text, which causes mismatch warnings with
machine_early_init() and start_kernel() in .init.text.
Signed-off-by: NSteven J. Magnani <steve@digidescorp.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

Function traces on Microblaze don't include IRQ entry and exit arrows,
i.e.

 0)               |                            memcpy_toiovec() {
 0)   ==========> |
 0)               |                              do_IRQ() {
 ...
 0)   <========== |
 0) ! 5414.000 us |                            }

...because do_IRQ() doesn't have the proper attributes.
Signed-off-by: NSteven J. Magnani <steve@digidescorp.com>
Signed-off-by: NMichal Simek <monstr@monstr.eu>

This change should be part of b26b2d49

Origin description:

resource/PCI: align functions now return start of resource

As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

This change should be part of 89a74ecc

Origin description:

PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs

No functional change; this converts loops that iterate from 0 to
PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the
pci_bus_for_each_resource() iterator instead.

This doesn't change the way resources are stored; it merely removes
dependencies on the fact that they're in a table.
Signed-off-by: NMichal Simek <monstr@monstr.eu>

The use of mfp_cfg_t causes build errors without including <mach/mfp.h>.

CC: stable@kernel.org
CC: Daniel Mack <daniel@caiaq.de>
Signed-off-by: NJakob Viketoft <jakob.viketoft@bitsim.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

On/Off contains slash in the name, which causes warning during boot.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Fix the wrong variable used in cpu_is_pxa950().
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Update CPUID pattern of PXA9xx in head.S and fix the duplicate
entries for pxa935.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

The timeout value is in jiffies, so it should be using HZ, not a plain
number. Assume with HZ=100 '100' means 1s here and adapt accordingly.
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NMarc Zyngier <maz@misterjones.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Shen <paul.shen@marvell.com>
Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Jean Delvare <khali@linux-fr.org>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

"on/off button" was recently renamed to remove the slash character.
Follow that change in the pin polarity detection as well.

While at it, fix another cosmetic coding style flaw as well.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

- Bring in a CMDLINE that actually works and prints to the right tty
- Compile-in JFFS2 to boot into rootfs
- Remove unneeded options for Bluetooth and radio
- Disable CPU_FREQ as it makes the flash driver fail

Thanks Jonathan for spotting what I messed up.
Signed-off-by: NStefan Schmidt <stefan@datenfreihafen.org>
Acked-by: NJonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

The x86_64 call_rwsem_wait() treats the active state counter part of the
R/W semaphore state as being 16-bit when it's actually 32-bit (it's half
of the 64-bit state).  It should do "decl %edx" not "decw %dx".
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The show_mem() and mem_init() function are assuming that the page map is
contiguous and calculates the start and end page of a bank using (map +
pfn). This fails with SPARSEMEM where pfn_to_page() must be used.
Tested-by: NWill Deacon <Will.Deacon@arm.com>
Tested-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

With F10, model 10, all valid frequencies are in the ACPI _PST table.

Cc: <stable@kernel.org> # 33.x 32.x
Signed-off-by: NMark Langsdorf <mark.langsdorf@amd.com>
LKML-Reference: <1270065406-1814-6-git-send-email-bp@amd64.org>
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Reviewed-by: NThomas Renninger <trenn@suse.de>
Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Commit e67a807f ("x86: Fix 'reservetop=' functionality") added a
fixup_early_ioremap() call to parse_reservetop() and declared it
in io.h.

But asm/io.h was only included indirectly - and on some configs
not at all, causing a build failure on those configs.

Cc: Liang Li <liang.li@windriver.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Wang Chen <wangchen@cn.fujitsu.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <1272621711-8683-1-git-send-email-liang.li@windriver.com>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

iop32x_defconfig:

In file included from include/linux/elf.h:7,
                 from kernel/elfcore.c:1:
arch/arm/include/asm/elf.h:101: warning: "struct task_struct" declared inside parameter list
arch/arm/include/asm/elf.h:101: warning: its scope is only this definition or declaration, which is probably not what you want
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Test the just-allocated value for NULL rather than some other value.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression x,y;
statement S;
@@

x = \(kmalloc\|kcalloc\|kzalloc\)(...);
(
if ((x) == NULL) S
|
if (
-   y
+   x
       == NULL)
 S
)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Just to make sure that this driver won't run on StrongArm SA1100
when both SA1100 and SA1110 cpufreq drivers are built in (usually
in multimachine config). SA1100 driver already has similar check.
Signed-off-by: NDmitry Artamonow <mad_soft@inbox.ru>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Acked-by: NKristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>