1. 11 6月, 2009 2 次提交
  2. 09 6月, 2009 8 次提交
    • C
      x86: Clear TS in irq_ts_save() when in an atomic section · 0b8c3d5a
      Chuck Ebbert 提交于
      The dynamic FPU context allocation changes caused the padlock driver
      to generate the below warning. Fix it by masking TS when doing padlock
      encryption operations in an atomic section.
      
      This solves:
      
      BUG: sleeping function called from invalid context at mm/slub.c:1602
      in_atomic(): 1, irqs_disabled(): 0, pid: 82, name: cryptomgr_test
      Pid: 82, comm: cryptomgr_test Not tainted 2.6.29.4-168.test7.fc11.x86_64 #1
      Call Trace:
      [<ffffffff8103ff16>] __might_sleep+0x10b/0x110
      [<ffffffff810cd3b2>] kmem_cache_alloc+0x37/0xf1
      [<ffffffff81018505>] init_fpu+0x49/0x8a
      [<ffffffff81012a83>] math_state_restore+0x3e/0xbc
      [<ffffffff813ac6d0>] do_device_not_available+0x9/0xb
      [<ffffffff810123ab>] device_not_available+0x1b/0x20
      [<ffffffffa001c066>] ? aes_crypt+0x66/0x74 [padlock_aes]
      [<ffffffff8119a51a>] ? blkcipher_walk_next+0x257/0x2e0
      [<ffffffff8119a731>] ? blkcipher_walk_first+0x18e/0x19d
      [<ffffffffa001c1fe>] aes_encrypt+0x9d/0xe5 [padlock_aes]
      [<ffffffffa0027253>] crypt+0x6b/0x114 [xts]
      [<ffffffffa001c161>] ? aes_encrypt+0x0/0xe5 [padlock_aes]
      [<ffffffffa001c161>] ? aes_encrypt+0x0/0xe5 [padlock_aes]
      [<ffffffffa0027390>] encrypt+0x49/0x4b [xts]
      [<ffffffff81199acc>] async_encrypt+0x3c/0x3e
      [<ffffffff8119dafc>] test_skcipher+0x1da/0x658
      [<ffffffff811979c3>] ? crypto_spawn_tfm+0x8e/0xb1
      [<ffffffff8119672d>] ? __crypto_alloc_tfm+0x11b/0x15f
      [<ffffffff811979c3>] ? crypto_spawn_tfm+0x8e/0xb1
      [<ffffffff81199dbe>] ? skcipher_geniv_init+0x2b/0x47
      [<ffffffff8119a905>] ? async_chainiv_init+0x5c/0x61
      [<ffffffff8119dfdd>] alg_test_skcipher+0x63/0x9b
      [<ffffffff8119e1bc>] alg_test+0x12d/0x175
      [<ffffffff8119c488>] cryptomgr_test+0x38/0x54
      [<ffffffff8119c450>] ? cryptomgr_test+0x0/0x54
      [<ffffffff8105c6c9>] kthread+0x4d/0x78
      [<ffffffff8101264a>] child_rip+0xa/0x20
      [<ffffffff81011f67>] ? restore_args+0x0/0x30
      [<ffffffff8105c67c>] ? kthread+0x0/0x78
      [<ffffffff81012640>] ? child_rip+0x0/0x20
      Signed-off-by: NChuck Ebbert <cebbert@redhat.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      LKML-Reference: <20090609104050.50158cfe@dhcp-100-2-144.bos.redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0b8c3d5a
    • A
      x86: Detect use of extended APIC ID for AMD CPUs · 42937e81
      Andreas Herrmann 提交于
      Booting a 32-bit kernel on Magny-Cours results in the following panic:
      
        ...
        Using APIC driver default
        ...
        Overriding APIC driver with bigsmp
        ...
        Getting VERSION: 80050010
        Getting VERSION: 80050010
        Getting ID: 10000000
        Getting ID: ef000000
        Getting LVT0: 700
        Getting LVT1: 10000
        Kernel panic - not syncing: Boot APIC ID in local APIC unexpected (16 vs 0)
        Pid: 1, comm: swapper Not tainted 2.6.30-rcX #2
        Call Trace:
         [<c05194da>] ? panic+0x38/0xd3
         [<c0743102>] ? native_smp_prepare_cpus+0x259/0x31f
         [<c073b19d>] ? kernel_init+0x3e/0x141
         [<c073b15f>] ? kernel_init+0x0/0x141
         [<c020325f>] ? kernel_thread_helper+0x7/0x10
      
      The reason is that default_get_apic_id handled extension of local APIC
      ID field just in case of XAPIC.
      
      Thus for this AMD CPU, default_get_apic_id() returns 0 and
      bigsmp_get_apic_id() returns 16 which leads to the respective kernel
      panic.
      
      This patch introduces a Linux specific feature flag to indicate
      support for extended APIC id (8 bits instead of 4 bits width) and sets
      the flag on AMD CPUs if applicable.
      Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <20090608135509.GA12431@alberich.amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      42937e81
    • Y
      cpumask: alloc zeroed cpumask for static cpumask_var_ts · eaa95840
      Yinghai Lu 提交于
      These are defined as static cpumask_var_t so if MAXSMP is not used,
      they are cleared already.  Avoid surprises when MAXSMP is enabled.
      Signed-off-by: NYinghai Lu <yinghai.lu@kernel.org>
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      eaa95840
    • J
      amd-iommu: remove unnecessary "AMD IOMMU: " prefix · e9a22a13
      Joerg Roedel 提交于
      That prefix is already included in the DUMP_printk macro. So there is no
      need to repeat it in the format string.
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      e9a22a13
    • J
      amd-iommu: detach device explicitly before attaching it to a new domain · 71ff3bca
      Joerg Roedel 提交于
      This fixes a bug with a device that could not be assigned to a KVM guest
      because it is still assigned to a dma_ops protection domain.
      
      [chrisw: simply remove WARN_ON(), will always fire since dev->driver
      will be pci-sub]
      Signed-off-by: NChris Wright <chrisw@sous-sol.org>
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      71ff3bca
    • J
      amd-iommu: remove BUS_NOTIFY_BOUND_DRIVER handling · 29150078
      Joerg Roedel 提交于
      Handling this event causes device assignment in KVM to fail because the
      device gets re-attached as soon as the pci-stub registers as the driver
      for the device.
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      29150078
    • A
      x86: memtest: remove 64-bit division · c9690998
      Andreas Herrmann 提交于
      Using gcc 3.3.5 a "make allmodconfig" + "CONFIG_KVM=n"
      triggers a build error:
      
       arch/x86/mm/built-in.o(.init.text+0x43f7): In function `__change_page_attr':
       arch/x86/mm/pageattr.c:114: undefined reference to `__udivdi3'
       make: *** [.tmp_vmlinux1] Error 1
      
      The culprit turned out to be a division in arch/x86/mm/memtest.c
      For more info see this thread:
      
        http://marc.info/?l=linux-kernel&m=124416232620683
      
      The patch entirely removes the division that caused the build
      error.
      
      [ Impact: build fix with certain GCC versions ]
      Reported-by: NTetsuo Handa <penguin-kernel@i-love.sakura.ne.jp>
      Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: xiyou.wangcong@gmail.com
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: <stable@kernel.org>
      LKML-Reference: <20090608170939.GB12431@alberich.amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c9690998
    • J
      x86, UV: Fix macros for multiple coherency domains · c4ed3f04
      Jack Steiner 提交于
      Fix bug in the SGI UV macros that support systems with multiple
      coherency domains.  The macros used for referencing global MMR
      (chipset registers) are failing to correctly "or" the NASID
      (node identifier) bits that reside above M+N. These high bits
      are supplied automatically by the chipset for memory accesses
      coming from the processor socket.
      
      However, the bits must be present for references to the special
      global MMR space used to map chipset registers. (See uv_hub.h
      for more details ...)
      
      The bug results in references to invalid/incorrect nodes.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <20090608154405.GA16395@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c4ed3f04
  3. 08 6月, 2009 5 次提交
  4. 07 6月, 2009 6 次提交
  5. 06 6月, 2009 2 次提交
    • M
      x86: enable GART-IOMMU only after setting up protection methods · fe2245c9
      Mark Langsdorf 提交于
      The current code to set up the GART as an IOMMU enables GART
      translations before it removes the aperture from the kernel memory
      map, sets the GART PTEs to UC, sets up the guard and scratch
      pages, or does a wbinvd().  This leaves the possibility of cache
      aliasing open and can cause system crashes.
      
      Re-order the code so as to enable the GART translations only
      after all safeguards are in place and the tlb has been flushed.
      
      AMD has tested this patch on both Istanbul systems and 1st
      generation Opteron systems with APG enabled and seen no adverse
      effects.  Istanbul systems with HT Assist enabled sometimes
      see MCE errors due to cache artifacts with the unmodified
      code.
      Signed-off-by: NMark Langsdorf <mark.langsdorf@amd.com>
      Cc: <stable@kernel.org>
      Cc: Joerg Roedel <joerg.roedel@amd.com>
      Cc: akpm@linux-foundation.org
      Cc: jbarnes@virtuousgeek.org
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      fe2245c9
    • D
      [CPUFREQ] powernow-k8: check space_id of _PCT registers to be FFH · 2c701b10
      Dave Jones 提交于
      The powernow-k8 driver checks to see that the Performance Control/Status
      Registers are declared as FFH (functional fixed hardware) by the BIOS.
      However, this check got broken in the commit:
       0e64a0c9
       [CPUFREQ] checkpatch cleanups for powernow-k8
      
      Fix based on an original patch from Naga Chumbalkar.
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Cc: Mark Langsdorf <mark.langsdorf@amd.com>
      Signed-off-by: NDave Jones <davej@redhat.com>
      2c701b10
  6. 05 6月, 2009 1 次提交
  7. 04 6月, 2009 3 次提交
  8. 03 6月, 2009 6 次提交
  9. 02 6月, 2009 3 次提交
    • B
      powerpc/pmac: Update PowerMac 32-bit defconfig · 60e59f68
      Benjamin Herrenschmidt 提交于
      This mostly adds back AppleTouch support and adds CONFIG_HIGHMEM
      by default.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      60e59f68
    • J
      x86, apic: Restore irqs on fail paths · 3d58829b
      Jiri Slaby 提交于
      lapic_resume forgets to restore interrupts on fail paths.
      Fix that.
      Signed-off-by: NJiri Slaby <jirislaby@gmail.com>
      Acked-by: NCyrill Gorcunov <gorcunov@openvz.org>
      LKML-Reference: <1243497289-18591-1-git-send-email-jirislaby@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Cc: H. Peter Anvin <hpa@zytor.com>
      3d58829b
    • N
      x86: Print real IOAPIC version for x86-64 · 58f892e0
      Naga Chumbalkar 提交于
      Fix the fact that the IOAPIC version number in the x86_64 code path always
      gets assigned to 0, instead of the correct value.
      
      Before the patch: (from "dmesg" output):
      
       ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0])
       IOAPIC[0]: apic_id 8, version 0, address 0xfec00000, GSI 0-23     <---
      
       After the patch:
       ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0])
       IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-23    <---
      
      History:
      
      io_apic_get_version() was compiled out of the x86_64 code path in the commit
      f2c2cca3:
      
      Author: Andi Kleen <ak@suse.de>
      Date:   Tue Sep 26 10:52:37 2006 +0200
      
          [PATCH] Remove APIC version/cpu capability mpparse checking/printing
      
          ACPI went to great trouble to get the APIC version and CPU capabilities
          of different CPUs before passing them to the mpparser. But all
          that data was used was to print it out.  Actually it even faked some data
          based on the boot cpu, not on the actual CPU being booted.
      
          Remove all this code because it's not needed.
      
          Cc: len.brown@intel.com
      
      At the time, the IOAPIC version number was deliberately not printed
      in the x86_64 code path. However, after the x86 and x86_64 files were
      merged, the net result is that the IOAPIC version is printed incorrectly
      in the x86_64 code path.
      
      The patch below provides a fix. I have tested it with acpi, and with
      acpi=off, and did not see any problems.
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Acked-by: NYinghai Lu <yhlu.kernel@gmail.com>
      LKML-Reference: <20090416014230.4885.94926.sendpatchset@localhost.localdomain>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      *************************
      58f892e0
  10. 30 5月, 2009 2 次提交
  11. 29 5月, 2009 2 次提交
    • M
      x86: ignore VM_LOCKED when determining if hugetlb-backed page tables can be shared or not · 32b154c0
      Mel Gorman 提交于
      Addresses http://bugzilla.kernel.org/show_bug.cgi?id=13302
      
      On x86 and x86-64, it is possible that page tables are shared beween
      shared mappings backed by hugetlbfs.  As part of this,
      page_table_shareable() checks a pair of vma->vm_flags and they must match
      if they are to be shared.  All VMA flags are taken into account, including
      VM_LOCKED.
      
      The problem is that VM_LOCKED is cleared on fork().  When a process with a
      shared memory segment forks() to exec() a helper, there will be shared
      VMAs with different flags.  The impact is that the shared segment is
      sometimes considered shareable and other times not, depending on what
      process is checking.
      
      What happens is that the segment page tables are being shared but the
      count is inaccurate depending on the ordering of events.  As the page
      tables are freed with put_page(), bad pmd's are found when some of the
      children exit.  The hugepage counters also get corrupted and the Total and
      Free count will no longer match even when all the hugepage-backed regions
      are freed.  This requires a reboot of the machine to "fix".
      
      This patch addresses the problem by comparing all flags except VM_LOCKED
      when deciding if pagetables should be shared or not for hugetlbfs-backed
      mapping.
      Signed-off-by: NMel Gorman <mel@csn.ul.ie>
      Acked-by: NHugh Dickins <hugh.dickins@tiscali.co.uk>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: <stable@kernel.org>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
      Cc: <starlight@binnacle.cx>
      Cc: Eric B Munson <ebmunson@us.ibm.com>
      Cc: Adam Litke <agl@us.ibm.com>
      Cc: Andy Whitcroft <apw@canonical.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      32b154c0
    • O
      flat: fix data sections alignment · c3dc5bec
      Oskar Schirmer 提交于
      The flat loader uses an architecture's flat_stack_align() to align the
      stack but assumes word-alignment is enough for the data sections.
      
      However, on the Xtensa S6000 we have registers up to 128bit width
      which can be used from userspace and therefor need userspace stack and
      data-section alignment of at least this size.
      
      This patch drops flat_stack_align() and uses the same alignment that
      is required for slab caches, ARCH_SLAB_MINALIGN, or wordsize if it's
      not defined by the architecture.
      
      It also fixes m32r which was obviously kaput, aligning an
      uninitialized stack entry instead of the stack pointer.
      
      [akpm@linux-foundation.org: coding-style fixes]
      Signed-off-by: NOskar Schirmer <os@emlix.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Bryan Wu <cooloney@kernel.org>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Acked-by: NPaul Mundt <lethal@linux-sh.org>
      Cc: Greg Ungerer <gerg@uclinux.org>
      Signed-off-by: NJohannes Weiner <jw@emlix.com>
      Acked-by: NMike Frysinger <vapier.adi@gmail.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      c3dc5bec