1. 27 1月, 2009 1 次提交
  2. 26 1月, 2009 3 次提交
    • R
      x86: fix section mismatch warning · 659d2618
      Rakib Mullick 提交于
      Here function vmi_activate calls a init function activate_vmi , which
      causes the following section mismatch warnings:
      
        LD      arch/x86/kernel/built-in.o
      WARNING: arch/x86/kernel/built-in.o(.text+0x13ba9): Section mismatch
      in reference from the function vmi_activate() to the function
      .init.text:vmi_time_init()
      The function vmi_activate() references
      the function __init vmi_time_init().
      This is often because vmi_activate lacks a __init
      annotation or the annotation of vmi_time_init is wrong.
      
      WARNING: arch/x86/kernel/built-in.o(.text+0x13bd1): Section mismatch
      in reference from the function vmi_activate() to the function
      .devinit.text:vmi_time_bsp_init()
      The function vmi_activate() references
      the function __devinit vmi_time_bsp_init().
      This is often because vmi_activate lacks a __devinit
      annotation or the annotation of vmi_time_bsp_init is wrong.
      
      WARNING: arch/x86/kernel/built-in.o(.text+0x13bdb): Section mismatch
      in reference from the function vmi_activate() to the function
      .devinit.text:vmi_time_ap_init()
      The function vmi_activate() references
      the function __devinit vmi_time_ap_init().
      This is often because vmi_activate lacks a __devinit
      annotation or the annotation of vmi_time_ap_init is wrong.
      
      Fix it by marking vmi_activate() as __init too.
      Signed-off-by: NRakib Mullick <rakib.mullick@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      659d2618
    • I
      x86: unmask CPUID levels on Intel CPUs, fix · 99fb4d34
      Ingo Molnar 提交于
      Impact: fix boot hang on pre-model-15 Intel CPUs
      
      rdmsrl_safe() does not work in very early bootup code yet, because we
      dont have the pagefault handler installed yet so exception section
      does not get parsed. rdmsr_safe() will just crash and hang the bootup.
      
      So limit the MSR_IA32_MISC_ENABLE MSR read to those CPU types that
      support it.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      99fb4d34
    • E
      x86: work around PAGE_KERNEL_WC not getting WC in iomap_atomic_prot_pfn. · ef5fa0ab
      Eric Anholt 提交于
      In the absence of PAT, PAGE_KERNEL_WC ends up mapping to a memory type that
      gets UC behavior even in the presence of a WC MTRR covering the area in
      question.  By swapping to PAGE_KERNEL_UC_MINUS, we can get the actual
      behavior the caller wanted (WC if you can manage it, UC otherwise).
      
      This recovers the 40% performance improvement of using WC in the DRM
      to upload vertex data.
      Signed-off-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      ef5fa0ab
  3. 25 1月, 2009 1 次提交
    • I
      x86: use standard PIT frequency · e1b4d114
      Ingo Molnar 提交于
      the RDC and ELAN platforms use slighly different PIT clocks, resulting in
      a timex.h hack that changes PIT_TICK_RATE during build time. But if a
      tester enables any of these platform support .config options, the PIT
      will be miscalibrated on standard PC platforms.
      
      So use one frequency - in a subsequent patch we'll add a quirk to allow
      x86 platforms to define different PIT frequencies.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e1b4d114
  4. 24 1月, 2009 1 次提交
    • P
      x86, mm: fix pte_free() · 42ef73fe
      Peter Zijlstra 提交于
      On -rt we were seeing spurious bad page states like:
      
      Bad page state in process 'firefox'
      page:c1bc2380 flags:0x40000000 mapping:c1bc2390 mapcount:0 count:0
      Trying to fix it up, but a reboot is needed
      Backtrace:
      Pid: 503, comm: firefox Not tainted 2.6.26.8-rt13 #3
      [<c043d0f3>] ? printk+0x14/0x19
      [<c0272d4e>] bad_page+0x4e/0x79
      [<c0273831>] free_hot_cold_page+0x5b/0x1d3
      [<c02739f6>] free_hot_page+0xf/0x11
      [<c0273a18>] __free_pages+0x20/0x2b
      [<c027d170>] __pte_alloc+0x87/0x91
      [<c027d25e>] handle_mm_fault+0xe4/0x733
      [<c043f680>] ? rt_mutex_down_read_trylock+0x57/0x63
      [<c043f680>] ? rt_mutex_down_read_trylock+0x57/0x63
      [<c0218875>] do_page_fault+0x36f/0x88a
      
      This is the case where a concurrent fault already installed the PTE and
      we get to free the newly allocated one.
      
      This is due to pgtable_page_ctor() doing the spin_lock_init(&page->ptl)
      which is overlaid with the {private, mapping} struct.
      
      union {
          struct {
              unsigned long private;
              struct address_space *mapping;
          };
          spinlock_t ptl;
          struct kmem_cache *slab;
          struct page *first_page;
      };
      
      Normally the spinlock is small enough to not stomp on page->mapping, but
      PREEMPT_RT=y has huge 'spin'locks.
      
      But lockdep kernels should also be able to trigger this splat, as the
      lock tracking code grows the spinlock to cover page->mapping.
      
      The obvious fix is calling pgtable_page_dtor() like the regular pte free
      path __pte_free_tlb() does.
      
      It seems all architectures except x86 and nm10300 already do this, and
      nm10300 doesn't seem to use pgtable_page_ctor(), which suggests it
      doesn't do SMP or simply doesnt do MMU at all or something.
      Signed-off-by: NPeter Zijlstra <a.p.zijlsta@chello.nl>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Cc: <stable@kernel.org>
      42ef73fe
  5. 23 1月, 2009 6 次提交
  6. 22 1月, 2009 4 次提交
  7. 21 1月, 2009 18 次提交
    • N
      x86: make UV support configurable · 03b48632
      Nick Piggin 提交于
      Make X86 SGI Ultraviolet support configurable. Saves about 13K of text size
      on my modest config.
      
         text    data     bss     dec     hex filename
      6770537 1158680  694356 8623573  8395d5 vmlinux
      6757492 1157664  694228 8609384  835e68 vmlinux.nouv
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      03b48632
    • T
      x86: mtrr fix debug boot parameter · 731f1872
      Thomas Renninger 提交于
      while looking at:
      
        http://bugzilla.kernel.org/show_bug.cgi?id=11541
      
      I realized that the mtrr.show param cannot work, because
      the code is processed much too early.
      
      This patch:
       - Declares mtrr.show as early_param
       - Stays consistent with the previous param (which I doubt
         that it ever worked), so mtrr.show=1 would still work
       - Declares mtrr_show as initdata
      Signed-off-by: NThomas Renninger <trenn@suse.de>
      Acked-by: NJan Beulich <jbeulich@novell.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      731f1872
    • S
      x86: fix page attribute corruption with cpa() · a1e46212
      Suresh Siddha 提交于
      Impact: fix sporadic slowdowns and warning messages
      
      This patch fixes a performance issue reported by Linus on his
      Nehalem system. While Linus reverted the PAT patch (commit
      58dab916) which exposed the issue,
      existing cpa() code can potentially still cause wrong(page attribute
      corruption) behavior.
      
      This patch also fixes the "WARNING: at arch/x86/mm/pageattr.c:560" that
      various people reported.
      
      In 64bit kernel, kernel identity mapping might have holes depending
      on the available memory and how e820 reports the address range
      covering the RAM, ACPI, PCI reserved regions. If there is a 2MB/1GB hole
      in the address range that is not listed by e820 entries, kernel identity
      mapping will have a corresponding hole in its 1-1 identity mapping.
      
      If cpa() happens on the kernel identity mapping which falls into these holes,
      existing code fails like this:
      
      	__change_page_attr_set_clr()
      		__change_page_attr()
      			returns 0 because of if (!kpte). But doesn't
      			set cpa->numpages and cpa->pfn.
      		cpa_process_alias()
      			uses uninitialized cpa->pfn (random value)
      			which can potentially lead to changing the page
      			attribute of kernel text/data, kernel identity
      			mapping of RAM pages etc. oops!
      
      This bug was easily exposed by another PAT patch which was doing
      cpa() more often on kernel identity mapping holes (physical range between
      max_low_pfn_mapped and 4GB), where in here it was setting the
      cache disable attribute(PCD) for kernel identity mappings aswell.
      
      Fix cpa() to handle the kernel identity mapping holes. Retain
      the WARN() for cpa() calls to other not present address ranges
      (kernel-text/data, ioremap() addresses)
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a1e46212
    • I
      x86: make x86_32 use tlb_64.c, build fix, clean up X86_L1_CACHE_BYTES · ace6c6c8
      Ingo Molnar 提交于
      Fix:
      
        arch/x86/mm/tlb.c:47: error: ‘CONFIG_X86_INTERNODE_CACHE_BYTES’ undeclared here (not in a function)
      
      The CONFIG_X86_INTERNODE_CACHE_BYTES symbol is only defined on 64-bit,
      because vsmp support is 64-bit only. Define it on 32-bit too - where it
      will always be equal to X86_L1_CACHE_BYTES.
      
      Also move the default of X86_L1_CACHE_BYTES (which is separate from the
      more commonly used L1_CACHE_SHIFT kconfig symbol) from 128 bytes to
      64 bytes.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ace6c6c8
    • I
      x86: uv cleanup, build fix · 4ec71fa2
      Ingo Molnar 提交于
      Fix:
      
       arch/x86/mm/srat_64.c: In function ‘acpi_numa_processor_affinity_init’:
       arch/x86/mm/srat_64.c:141: error: implicit declaration of function ‘get_uv_system_type’
       arch/x86/mm/srat_64.c:141: error: ‘UV_X2APIC’ undeclared (first use in this function)
       arch/x86/mm/srat_64.c:141: error: (Each undeclared identifier is reported only once
       arch/x86/mm/srat_64.c:141: error: for each function it appears in.)
      
      A couple of UV definitions were moved to asm/uv/uv.h, but srat_64.c did
      not include that header. Add it.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4ec71fa2
    • I
      x86, mm: move tlb.c to arch/x86/mm/ · 55f4949f
      Ingo Molnar 提交于
      Impact: cleanup
      
      Now that it's unified, move the (SMP) TLB flushing code from arch/x86/kernel/
      to arch/x86/mm/, where it belongs logically.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      55f4949f
    • I
      Revert "x86: signal: change type of paramter for sys_rt_sigreturn()" · 552b8aa4
      Ingo Molnar 提交于
      This reverts commit 4217458d.
      
      Justin Madru bisected this commit, it was causing weird Firefox
      crashes.
      
      The reason is that GCC mis-optimizes (re-uses) the on-stack parameters of
      the calling frame, which corrupts the syscall return pt_regs state and
      thus corrupts user-space register state.
      
      So we go back to the slightly less clean but more optimization-safe
      method of getting to pt_regs. Also add a comment to explain this.
      
      Resolves: http://bugzilla.kernel.org/show_bug.cgi?id=12505Reported-and-bisected-by: NJustin Madru <jdm64@gawab.com>
      Tested-by: NJustin Madru <jdm64@gawab.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      552b8aa4
    • A
      x86: use early clobbers in usercopy*.c · e0a96129
      Andi Kleen 提交于
      Impact: fix rare (but currently harmless) miscompile with certain configs and gcc versions
      
      Hugh Dickins noticed that strncpy_from_user() was miscompiled
      in some circumstances with gcc 4.3.
      
      Thanks to Hugh's excellent analysis it was easy to track down.
      
      Hugh writes:
      
      > Try building an x86_64 defconfig 2.6.29-rc1 kernel tree,
      > except not quite defconfig, switch CONFIG_PREEMPT_NONE=y
      > and CONFIG_PREEMPT_VOLUNTARY off (because it expands a
      > might_fault() there, which hides the issue): using a
      > gcc 4.3.2 (I've checked both openSUSE 11.1 and Fedora 10).
      >
      > It generates the following:
      >
      > 0000000000000000 <__strncpy_from_user>:
      >    0:   48 89 d1                mov    %rdx,%rcx
      >    3:   48 85 c9                test   %rcx,%rcx
      >    6:   74 0e                   je     16 <__strncpy_from_user+0x16>
      >    8:   ac                      lods   %ds:(%rsi),%al
      >    9:   aa                      stos   %al,%es:(%rdi)
      >    a:   84 c0                   test   %al,%al
      >    c:   74 05                   je     13 <__strncpy_from_user+0x13>
      >    e:   48 ff c9                dec    %rcx
      >   11:   75 f5                   jne    8 <__strncpy_from_user+0x8>
      >   13:   48 29 c9                sub    %rcx,%rcx
      >   16:   48 89 c8                mov    %rcx,%rax
      >   19:   c3                      retq
      >
      > Observe that "sub %rcx,%rcx; mov %rcx,%rax", whereas gcc 4.2.1
      > (and many other configs) say "sub %rcx,%rdx; mov %rdx,%rax".
      > Isn't it returning 0 when it ought to be returning strlen?
      
      The asm constraints for the strncpy_from_user() result were missing an
      early clobber, which tells gcc that the last output arguments
      are written before all input arguments are read.
      
      Also add more early clobbers in the rest of the file and fix 32-bit
      usercopy.c in the same way.
      Signed-off-by: NAndi Kleen <ak@linux.intel.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      [ since this API is rarely used and no in-kernel user relies on a 'len'
        return value (they only rely on negative return values) this miscompile
        was never noticed in the field. But it's worth fixing it nevertheless. ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e0a96129
    • T
      x86: rename tlb_64.c to tlb.c · 16c2d3f8
      Tejun Heo 提交于
      Impact: file rename
      
      tlb_64.c is now the tlb code for both 32 and 64.  Rename it to tlb.c.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      16c2d3f8
    • T
      x86: make x86_32 use tlb_64.c · 02cf94c3
      Tejun Heo 提交于
      Impact: less contention when issuing invalidate IPI, cleanup
      
      Make x86_32 use the same tlb code as 64bit.  The 64bit code uses
      multiple IPI vectors for tlb shootdown to reduce contention.  This
      patch makes x86_32 allocate the same 8 IPIs as x86_64 and share the
      code paths.
      
      Note that the usage of asmlinkage is inconsistent for x86_32 and 64
      and calls for further cleanup.  This has been noted with a FIXME
      comment in tlb_64.c.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      02cf94c3
    • T
      x86: prepare for tlb merge · 6dd01bed
      Tejun Heo 提交于
      Impact: clean up, ipi vector number reordering for x86_32
      
      Make the following changes to prepare for tlb merge.
      
      * reorder x86_32 ip vectors
      
      * adjust tlb_32.c and tlb_64.c such that their logics coincide exactly
      	- on spurious invalidate ipi, tlb_32 acks the irq
      	- tlb_64 now has proper memory barriers around clearing
                flush_cpumask (no change in generated code)
      
      * unexport flush_tlb_page from tlb_32.c, there's no user
      
      * use unsigned int for cpu id
      
      * drop unnecessary includes from tlb_64.c
      Signed-off-by: NTejun Heo <tj@kernel.org>
      6dd01bed
    • T
      x86: uv cleanup · bdbcdd48
      Tejun Heo 提交于
      Impact: cleanup
      
      Make the following uv related cleanups.
      
      * collect visible uv related definitions and interfaces into uv/uv.h
        and use it.  this cleans up the messy situation where on 64bit, uv
        is defined properly, on 32bit generic it's dummy and on the rest
        undefined.  after this clean up, uv is defined on 64 and dummy on
        32.
      
      * update uv_flush_tlb_others() such that it takes cpumask of
        to-be-flushed cpus as argument, instead of that minus self, and
        returns yet-to-be-flushed cpumask, instead of modifying the passed
        in parameter.  this interface change will ease dummy implementation
        of uv_flush_tlb_others() and makes uv tlb flush related stuff
        defined in tlb_uv proper.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      bdbcdd48
    • B
      x86: merge irq_regs.h · d650a514
      Brian Gerst 提交于
      Impact: cleanup, better irq_regs code generation for x86_64
      
      Make 64-bit use the same optimizations as 32-bit.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      d650a514
    • B
      x86: merge mmu_context.h · 6826c8ff
      Brian Gerst 提交于
      Impact: cleanup
      
      tj: * changed cpu to unsigned as was done on mmu_context_64.h as cpu
            id is officially unsigned int
          * added missing ';' to 32bit version of deactivate_mm()
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      6826c8ff
    • B
      x86: set %fs to __KERNEL_PERCPU unconditionally for x86_32 · 0dd76d73
      Brian Gerst 提交于
      Impact: cleanup
      
      %fs is currently set to __KERNEL_DS at boot, and conditionally
      switched to __KERNEL_PERCPU for secondary cpus.  Instead, initialize
      GDT_ENTRY_PERCPU to the same attributes as GDT_ENTRY_KERNEL_DS and
      set %fs to __KERNEL_PERCPU unconditionally.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      0dd76d73
    • B
      x86: fix percpu_write with 64-bit constants · 299e2699
      Brian Gerst 提交于
      Impact: slightly better code generation for percpu_to_op()
      
      The processor will sign-extend 32-bit immediate values in 64-bit
      operations.  Use the 'e' constraint ("32-bit signed integer constant,
      or a symbolic reference known to fit that range") for 64-bit constants.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      299e2699
    • B
      x86: clean up gdt_page definition · 06deef89
      Brian Gerst 提交于
      Impact: cleanup && more compact percpu area layout with future changes
      
      Move 64-bit GDT to page-aligned section and clean up comment
      formatting.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      06deef89
    • T
      x86: update canary handling during switch · 67e68bde
      Tejun Heo 提交于
      Impact: cleanup
      
      In switch_to(), instead of taking offset to irq_stack_union.stack,
      make it a proper percpu access using __percpu_arg() and per_cpu_var().
      Signed-off-by: NTejun Heo <tj@kernel.org>
      67e68bde
  8. 20 1月, 2009 6 次提交
    • N
      x86: optimise x86's do_page_fault (C entry point for the page fault path) · 92181f19
      Nick Piggin 提交于
      Impact: cleanup, restructure code to improve assembly
      
      gcc isn't _all_ that smart about spilling registers to stack or reusing
      stack slots, even with branch annotations. do_page_fault contained a lot
      of functionality, so split unlikely paths into their own functions, and
      mark them as noinline just to be sure. I consider this actually to be
      somewhat of a cleanup too: the main function now contains about half
      the number of lines so the normal path is easier to read, while the error
      cases are also nicely split away.
      
      Also, ensure the order of arguments to functions is always the same: regs,
      addr, error_code. This can reduce code size a tiny bit, and just looks neater
      too.
      
      And add a couple of branch annotations.
      
      Before:
        do_page_fault:
                subq    $360, %rsp      #,
      
      After:
        do_page_fault:
                subq    $56, %rsp       #,
      
      bloat-o-meter:
        add/remove: 8/0 grow/shrink: 0/1 up/down: 2222/-1680 (542)
        function                                     old     new   delta
        __bad_area_nosemaphore                         -     506    +506
        no_context                                     -     474    +474
        vmalloc_fault                                  -     424    +424
        spurious_fault                                 -     358    +358
        mm_fault_error                                 -     272    +272
        bad_area_access_error                          -      89     +89
        bad_area                                       -      89     +89
        bad_area_nosemaphore                           -      10     +10
        do_page_fault                               2464     784   -1680
      
      Yes, the total size increases by 542 bytes, due to the extra function calls.
      But these will very rarely be called (except for vmalloc_fault) in a normal
      workload. Importantly, do_page_fault is less than 1/3rd it's original size,
      and touches far less stack.
      
      Existing gotos and branch hints did move a lot of the infrequently used text
      out of the fastpath, but that's even further improved after this patch.
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Acked-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      92181f19
    • I
      x86, cpumask: fix tlb flush race · 5766b842
      Ingo Molnar 提交于
      Impact: fix bootup crash
      
      The cpumask is now passed in as a reference to mm->cpu_vm_mask, not on
      the stack - hence it is not constant anymore during the TLB flush.
      
      That way it could race and some static sanity checks would trigger:
      
      [  238.154287] ------------[ cut here ]------------
      [  238.156039] kernel BUG at arch/x86/kernel/tlb_32.c:130!
      [  238.156039] invalid opcode: 0000 [#1] SMP
      [  238.156039] last sysfs file: /sys/class/net/eth2/address
      [  238.156039] Modules linked in:
      [  238.156039]
      [  238.156039] Pid: 6493, comm: ifup-eth Not tainted (2.6.29-rc2-tip #1) P4DC6
      [  238.156039] EIP: 0060:[<c0118f87>] EFLAGS: 00010202 CPU: 2
      [  238.156039] EIP is at native_flush_tlb_others+0x35/0x158
      [  238.156039] EAX: c0ef972c EBX: f6143301 ECX: 00000000 EDX: 00000000
      [  238.156039] ESI: f61433a8 EDI: f6143200 EBP: f34f3e00 ESP: f34f3df0
      [  238.156039]  DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068
      [  238.156039] Process ifup-eth (pid: 6493, ti=f34f2000 task=f399ab00 task.ti=f34f2000)
      [  238.156039] Stack:
      [  238.156039]  ffffffff f61433a8 ffffffff f6143200 f34f3e18 c0118e9c 00000000 f6143200
      [  238.156039]  f61433a8 f5bec738 f34f3e28 c0119435 c2b5b830 f6143200 f34f3e34 c01c2dc3
      [  238.156039]  bffd9000 f34f3e60 c01c3051 00000000 ffffffff f34f3e4c 00000000 00000071
      [  238.156039] Call Trace:
      [  238.156039]  [<c0118e9c>] ? flush_tlb_others+0x52/0x5b
      [  238.156039]  [<c0119435>] ? flush_tlb_mm+0x7f/0x8b
      [  238.156039]  [<c01c2dc3>] ? tlb_finish_mmu+0x2d/0x55
      [  238.156039]  [<c01c3051>] ? exit_mmap+0x124/0x170
      [  238.156039]  [<c013e965>] ? mmput+0x40/0xf5
      [  238.156039]  [<c01e4788>] ? flush_old_exec+0x640/0x94b
      [  238.156039]  [<c01ddb4e>] ? fsnotify_access+0x37/0x39
      [  238.156039]  [<c01e3435>] ? kernel_read+0x39/0x4b
      [  238.156039]  [<c021bc8a>] ? load_elf_binary+0x4a1/0x11bb
      [  238.156039]  [<c01c0af9>] ? might_fault+0x51/0x9c
      [  238.156039]  [<c010a2cc>] ? paravirt_read_tsc+0x20/0x4f
      [  238.156039]  [<c010a406>] ? native_sched_clock+0x5d/0x60
      [  238.156039]  [<c01e2fda>] ? search_binary_handler+0xab/0x2c4
      [  238.156039]  [<c021b7e9>] ? load_elf_binary+0x0/0x11bb
      [  238.156039]  [<c04ae9a5>] ? _raw_read_unlock+0x21/0x46
      [  238.156039]  [<c021b7e9>] ? load_elf_binary+0x0/0x11bb
      [  238.156039]  [<c01e2fe1>] ? search_binary_handler+0xb2/0x2c4
      [  238.156039]  [<c01e4076>] ? do_execve+0x21c/0x2ee
      [  238.156039]  [<c01029b7>] ? sys_execve+0x51/0x8c
      [  238.156039]  [<c0103eaf>] ? sysenter_do_call+0x12/0x43
      
      Fix it by not assuming that the cpumask is constant.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      5766b842
    • B
      x86: remove pda.h · 0d974d45
      Brian Gerst 提交于
      Impact: cleanup
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      0d974d45
    • B
      x86: move stack_canary into irq_stack · 947e76cd
      Brian Gerst 提交于
      Impact: x86_64 percpu area layout change, irq_stack now at the beginning
      
      Now that the PDA is empty except for the stack canary, it can be removed.
      The irqstack is moved to the start of the per-cpu section.  If the stack
      protector is enabled, the canary overlaps the bottom 48 bytes of the irqstack.
      
      tj: * updated subject
          * dropped asm relocation of irq_stack_ptr
          * updated comments a bit
          * rebased on top of stack canary changes
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      947e76cd
    • B
      x86: rework __per_cpu_load adjustments · 8c7e58e6
      Brian Gerst 提交于
      Impact: cleanup
      
      Use cpu_number to determine if the adjustment is necessary.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      8c7e58e6
    • B
      x86: remove pda_init() · 8ce03197
      Brian Gerst 提交于
      Impact: cleanup
      
      Copy the code to cpu_init() to satisfy the requirement that the cpu
      be reinitialized.  Remove all other calls, since the segments are
      already initialized in head_64.S.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      8ce03197