1. 22 9月, 2005 3 次提交
  2. 18 9月, 2005 3 次提交
  3. 15 9月, 2005 1 次提交
  4. 11 9月, 2005 1 次提交
  5. 10 9月, 2005 6 次提交
  6. 09 9月, 2005 18 次提交
    • P
      [PATCH] Separate pci bits out of struct device_node · 1635317f
      Paul Mackerras 提交于
      This patch pulls the PCI-related junk out of struct device_node and
      puts it in a separate structure, struct pci_dn.  The device_node now
      just has a void * pointer in it, which points to a struct pci_dn for
      nodes that represent PCI devices.  It could potentially be used in
      future for device-specific data for other sorts of devices, such as
      virtual I/O devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1635317f
    • B
      [PATCH] PCI/libata INTx cleanup · a04ce0ff
      Brett M Russ 提交于
      Simple cleanup to eliminate X copies of the pci_enable_intx() function
      in libata.  Moved ahci.c's pci_intx() to pci.c and use it throughout
      libata and msi.c.
      Signed-off-by: NBrett Russ <russb@emc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a04ce0ff
    • D
      [PATCH] PCI: Support PCM PM CAP version 3 · 3fe9d19f
      Daniel Ritz 提交于
      - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
      
      - pci/probe.c sets the PM state initially to 4 which is D3cold.  add a
        PCI_UNKNOWN
      
      - minor cleanups
      Signed-off-by: NDaniel Ritz <daniel.ritz@gmx.ch>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      3fe9d19f
    • P
      [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive) · cecf4864
      Paul Mackerras 提交于
      The PCI error recovery infrastructure needs to be able to contact all
      the drivers affected by a PCI error event, which may mean traversing
      all the devices under a given PCI-PCI bridge.  This patch adds a
      function to the PCI core that traverses all the PCI devices on a PCI
      bus and under any PCI-PCI bridges on that bus (and so on), calling a
      given function for each device.  This provides a way for the error
      recovery code to iterate through all devices that are affected by an
      error event.
      
      This version is not implemented as a recursive function.  Instead,
      when we reach a PCI-PCI bridge, we set the pointers to start doing the
      devices on the bus under the bridge, and when we reach the end of a
      bus's devices, we use the bus->self pointer to go back up to the next
      higher bus and continue doing its devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cecf4864
    • P
      [PATCH] PCI Hotplug: SGI hotplug driver fixes · 1d2450a4
      Prarit Bhargava 提交于
      These fixes were suggested by pcihpd-discuss, but were dropped in the
      initial checkin of the code.  These fixes include cleaning up the
      hotplug driver sysfs filename, and some minor code cleanups.  The driver
      also requires at least PROM 4.30, not 4.20.
      Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1d2450a4
    • A
      [PATCH] PCI: Fix regression in pci_enable_device_bars · 11f3859b
      Alan Stern 提交于
      This patch (as552) fixes yet another small problem recently added.  If an
      attempt to put a PCI device back into D0 fails because the device doesn't
      support PCI PM, it shouldn't count as error.  Without this patch the UHCI
      controllers on my Intel motherboard don't work.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      11f3859b
    • G
    • D
      [PATCH] Make sparc64 use setup-res.c · 085ae41f
      David S. Miller 提交于
      There were three changes necessary in order to allow
      sparc64 to use setup-res.c:
      
      1) Sparc64 roots the PCI I/O and MEM address space using
         parent resources contained in the PCI controller structure.
         I'm actually surprised no other platforms do this, especially
         ones like Alpha and PPC{,64}.  These resources get linked into the
         iomem/ioport tree when PCI controllers are probed.
      
         So the hierarchy looks like this:
      
         iomem --|
      	   PCI controller 1 MEM space --|
      				        device 1
      					device 2
      					etc.
      	   PCI controller 2 MEM space --|
      				        ...
         ioport --|
                  PCI controller 1 IO space --|
      					...
                  PCI controller 2 IO space --|
      					...
      
         You get the idea.  The drivers/pci/setup-res.c code allocates
         using plain iomem_space and ioport_space as the root, so that
         wouldn't work with the above setup.
      
         So I added a pcibios_select_root() that is used to handle this.
         It uses the PCI controller struct's io_space and mem_space on
         sparc64, and io{port,mem}_resource on every other platform to
         keep current behavior.
      
      2) quirk_io_region() is buggy.  It takes in raw BUS view addresses
         and tries to use them as a PCI resource.
      
         pci_claim_resource() expects the resource to be fully formed when
         it gets called.  The sparc64 implementation would do the translation
         but that's absolutely wrong, because if the same resource gets
         released then re-claimed we'll adjust things twice.
      
         So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
         conversion before passing it on to pci_claim_resource().
      
      3) I was mistakedly __init'ing the function methods the PCI controller
         drivers provide on sparc64 to implement some parts of these
         routines.  This was, of course, easy to fix.
      
      So we end up with the following, and that nasty SPARC64 makefile
      ifdef in drivers/pci/Makefile is finally zapped.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      085ae41f
    • J
      [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need it · 064b53db
      John W. Linville 提交于
      Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
      (including BARs) when transitioning from D3hot->D0.  This leaves such
      a device in an inaccessible state.  The patch below causes the BARs
      to be restored when enabling such a device, so that its driver will
      be able to access it.
      
      The patch also adds pci_restore_bars as a new global symbol, and adds a
      correpsonding EXPORT_SYMBOL_GPL for that.
      
      Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
      (re)boot.  Most drivers call pci_enable_device very early, so devices
      left in D3hot that lose configuration during the D3hot->D0 transition
      will be inaccessible to their drivers.
      
      Drivers could be modified to account for this, but it would
      be difficult to know which drivers need modification.  This is
      especially true since often many devices are covered by the same
      driver.  It likely would be necessary to replicate code across dozens
      of drivers.
      
      The patch below should trigger only when transitioning from D3hot->D0
      (or at boot), and only for devices that have the "no soft reset" bit
      cleared in the PM control register.  I believe it is safe to include
      this patch as part of the PCI infrastructure.
      
      The cleanest implementation of pci_restore_bars was to call
      pci_update_resource.  Unfortunately, that does not currently exist
      for the sparc64 architecture.  The patch below includes a null
      implemenation of pci_update_resource for sparc64.
      
      Some have expressed interest in making general use of the the
      pci_restore_bars function, so that has been exported to GPL licensed
      modules.
      Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      064b53db
    • K
      [PATCH] PCI Hotplug: use bus_slot number for name · 1248d636
      Kristen Accardi 提交于
      For systems with multiple hotplug controllers, you need to use more than
      just the slot number to uniquely name the slot.  Without a unique slot
      name, the pci_hp_register() will fail.  This patch adds the bus number
      to the name.
      Signed-off-by: NKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1248d636
    • A
      [PATCH] PCI: remove CONFIG_PCI_NAMES · 982245f0
      Adrian Bunk 提交于
      This patch removes CONFIG_PCI_NAMES.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      982245f0
    • A
      [PATCH] PCI: Run PCI driver initialization on local node · d42c6997
      Andi Kleen 提交于
      Run PCI driver initialization on local node
      
      Instead of adding messy kmalloc_node()s everywhere run the
      PCI driver probe on the node local to the device.
      
      This would not have helped for IDE, but should for
      other more clean drivers that do more initialization in probe().
      It won't help for drivers that do most of the work
      on first open (like many network drivers)
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      d42c6997
    • J
      [PATCH] PCI Hotplug: rpaphp: Purify hotplug · 56d8456b
      John Rose 提交于
      Currently rpaphp registers the following bus types as hotplug slots:
      1) Actual PCI Hotplug slots
      2) Embedded/Internal PCI slots
      3) PCI Host Bridges
      
      The second and third bus types are not actually direct parents of
      removable adapters.  As such, the rpaphp has special case code to fake
      results for attributes like power, adapter status, etc.  This patch
      removes types 2 and 3 from the rpaphp module.
      
      This patch also changes the DLPAR module so that slots can be
      DLPAR-added/removed without having been designated as hotplug-capable.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      56d8456b
    • J
      [PATCH] PCI Hotplug: rpaphp: Export slot enable · 940903c5
      John Rose 提交于
      This patch exports rpaphp_config_pci_adapter() for use by the rpadlpar
      module.  It also changes this function by removing any dependencies on
      struct slot.  The patch also changes the RPA DLPAR-add path to enable
      newly-added slots in a separate step from that which registers them as
      hotplug slots.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      940903c5
    • J
      [PATCH] PCI Hotplug: rpaphp: Remove rpaphp_find_pci · 0945cd5f
      John Rose 提交于
      The rpaphp module currently uses a fragile method to find a pci device
      by its device node.  This function is unnecessary, so this patch scraps
      it.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0945cd5f
    • J
      [PATCH] PCI Hotplug: rpaphp: Change slot pci reference · 9c209c91
      John Rose 提交于
      The slot structure in the rpaphp module currently references the PCI
      contents of the slot using the PCI device of the parent bridge.  This
      is unnecessary, since the module is actually interested in the
      subordinate bus of the bridge.  The dependency on a PCI bridge device
      also prohibits the module from registering hotplug slots that have a
      root bridge as a parent, since root bridges on PPC64 don't have PCI
      devices.
      
      This patch changes struct slot to reference the PCI subsystem using a
      pci_bus rather than a pci_dev.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      9c209c91
    • J
      [PATCH] PCI Hotplug: rpaphp: Move VIO registration · 5eeb8c63
      John Rose 提交于
      Currently, rpaphp registers Virtual I/O slots as hotplug slots.  The
      only purpose of this registration is to ensure that the VIO subsystem
      is notified of new VIO buses during DLPAR adds.  Similarly, rpaphp
      notifies the VIO subsystem when a VIO bus is DLPAR-removed.  The rpaphp
      module has special case code to fake results for attributes like power,
      adapter status, etc.
      
      The VIO register/unregister functions could just as easily be made from
      the DLPAR module.  This patch moves the VIO registration calls to the
      DLPAR module, and removes the VIO fluff from rpaphp altogether.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      5eeb8c63
    • J
      [PATCH] PCI Hotplug: rpaphp: Remove unused stuff · bde16841
      John Rose 提交于
      Subject line says it all :)
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bde16841
  7. 08 9月, 2005 1 次提交
    • A
      [PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity · 54d5d424
      Ashok Raj 提交于
      When handling writes to /proc/irq, current code is re-programming rte
      entries directly. This is not recommended and could potentially cause
      chipset's to lockup, or cause missing interrupts.
      
      CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
      interrupt is pending. The same needs to be done for /proc/irq handling as well.
      Otherwise user space irq balancers are really not doing the right thing.
      
      - Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
        lack of a generic name.
      - added move_irq out of IRQ_BALANCE, and added this same to X86_64
      - Added new proc handler for write, so we can do deferred write at irq
        handling time.
      - Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
        it now shows only active cpu masks, or exactly what was set.
      - Provided a common move_irq implementation, instead of duplicating
        when using generic irq framework.
      
      Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
      Tested UP builds as well.
      
      MSI testing: tbd: I have cards, need to look for a x-over cable, although I
      did test an earlier version of this patch.  Will test in a couple days.
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Acked-by: NZwane Mwaikambo <zwane@holomorphy.com>
      Grudgingly-acked-by: NAndi Kleen <ak@muc.de>
      Signed-off-by: NCoywolf Qi Hunt <coywolf@lovecn.org>
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      54d5d424
  8. 05 9月, 2005 2 次提交
  9. 02 9月, 2005 1 次提交
  10. 31 8月, 2005 1 次提交
    • I
      [PATCH] x86: pci_assign_unassigned_resources() update · 81d4af13
      Ivan Kokshaysky 提交于
      I had some time to think about PCI assign issues in 2.6.13-rc series.
      
      The major problem here is that we call pci_assign_unassigned_resources()
      way too early - at subsys_initcall level. Therefore we give no chances
      to ACPI and PnP routines (called at fs_initcall level) to reserve their
      respective resources properly, as the comments in drivers/pnp/system.c
      and drivers/acpi/motherboard.c suggest:
      
       /**
        * Reserve motherboard resources after PCI claim BARs,
        * but before PCI assign resources for uninitialized PCI devices
        */
      
      So I moved the pci_assign_unassigned_resources() call to
      pcibios_assign_resources() (fs_initcall), which should hopefully fix a
      lot of problems and make PCIBIOS_MIN_IO tweaks unnecessary.
      
      Other changes:
      - remove resource assignment code from pcibios_assign_resources(), since
        it duplicates pci_assign_unassigned_resources() functionality and
        actually does nothing in 2.6.13;
      - modify ROM assignment code as per Ben's suggestion: try to use firmware
        settings by default (if PCI_ASSIGN_ROMS is not set);
      - set CARDBUS_IO_SIZE back to 4K as it's a wonderful stress test for
        various setups.
      
      Confirmed by Tero Roponen <teanropo@cc.jyu.fi> (who had problems with
      the 4kB CardBus IO size previously).
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      81d4af13
  11. 27 8月, 2005 2 次提交
    • L
      Ignore disabled ROM resources at setup · 755528c8
      Linus Torvalds 提交于
      Writing even a disabled value seems to mess up some matrox graphics
      cards.  It may be a card-related issue, but we may also be writing
      reserved low bits in the result.
      
      This was a fall-out of switching x86 over to the generic PCI resource
      allocation code, and needs more debugging.  In particular, the old x86
      code defaulted to not doing any resource allocations at all for ROM
      resources.
      
      In the meantime, this has been reported to make X happier by Helge
      Hafting <helgehaf@aitel.hist.no>.
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      755528c8
    • L
      Only pre-allocate 256 bytes of cardbio IO range · 26aad69e
      Linus Torvalds 提交于
      It may seem small, but most cards need much less, if any, and this not
      only makes the code adhere to the comment, it seems to fix a boot-time
      lockup on a ThinkPad 380XD laptop reported by Tero Roponen <teanropo@cc.jyu.fi>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      26aad69e
  12. 25 8月, 2005 1 次提交