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  1. 08 7月, 2005 25 次提交
  3. 07 7月, 2005 15 次提交
    • T
      [IA64] fix generic/up builds · 8d7e3517
      由 Tony Luck 提交于 
      Jesse Barnes provided the original version of this patch months ago, but
other changes kept conflicting with it, so it got deferred.  Greg Edwards
dug it out of obscurity just over a week ago, and almost immediately
another conflicting patch appeared (Bob Picco's memory-less nodes).

I've resolved the conflicts and got it running again.  CONFIG_SGI_TIOCX
is set to "y" in defconfig, which causes a Tiger to not boot (oops in
tiocx_init).  But that can be resolved later ... get this in now before it
gets stale again.
Signed-off-by: NTony Luck <tony.luck@intel.com>
      8d7e3517
    • B
      [IA64] memory-less-nodes repost · 564601a5
      由 bob.picco 提交于 
      I reworked how nodes with only CPUs are treated.  The patch below seems
simpler to me and has eliminated the complicated routine
reassign_cpu_only_nodes.  There isn't any longer the requirement
to modify ACPI NUMA information which was in large part the
complexity introduced in reassign_cpu_only_nodes. 

This patch will produce a different number of nodes. For example,
reassign_cpu_only_nodes would reduce two CPUonly nodes and one memory node
configuration to one memory+CPUs node configuration.  This patch
doesn't change the number of nodes which means the user will see three.  Two
nodes without memory and one node with all the memory.

While doing this patch, I noticed that early_nr_phys_cpus_node isn't serving
any useful purpose.  It is called once in find_pernode_space but the value
isn't used to computer pernode space.  
Signed-off-by: Nbob.picco <bob.picco@hp.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      564601a5
    • [IA64] Make ia64 die() preempt safe · af25e94d
      由 提交于 
      Signed-off-by: NKeith Owens <kaos@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      af25e94d
    • E
      [SPARC64]: Fix set_intr_affinity() · 12cf649f
      由 Eddie C. Dost 提交于 
      Do not cat bucket->irq_info to struct irqaction * directly,
but go through struct irq_desc *.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      12cf649f
    • K
      [IA64] restore_sigcontext is not preempt safe · 2ba3e3e6
      由 Keith Owens 提交于 
      restore_sigcontext calls ia64_set_local_fpu_owner() which requires that
preempt be disabled.
Signed-off-by: NKeith Owens <kaos@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      2ba3e3e6
    • P
      [IA64] hotplug/ia64: SN Hotplug Driver - SN Hotplug Driver code · 6f354b01
      由 Prarit Bhargava 提交于 
      This patch is the SGI hotplug driver and additional changes required for
the driver.  These modifications include changes to the SN io_init.c code
for memory management, the inclusion of new SAL calls to enable and disable
PCI slots, and a hotplug-style driver.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      6f354b01
    • P
      [IA64] hotplug/ia64: SN Hotplug Driver - new SN PROM version code · 283c7f6a
      由 Prarit Bhargava 提交于 
      This patch is a rewrite of the code to check the PROM version.  The current
code has some deficiences in the way PROM comparisons were made.  The minimum
value of PROM that will boot has also been changed to 4.04.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      283c7f6a
    • P
      [IA64] hotplug/ia64: SN Hotplug Driver: moving of header files · c13cf371
      由 Prarit Bhargava 提交于 
      This patch moves header files out of the arch/ia64/sn directories and into
include/asm-ia64/sn.  These files were being included by other subsystems
and should be under include/asm-ia64/sn.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      c13cf371
    • D
      [PATCH] ARM: 2792/1: IXP4xx iomap API implementation · 450008b5
      由 Deepak Saxena 提交于 
      Patch from Deepak Saxena

This patch implements the iomap API for Intel IXP4xx NPU systems.
We need to implement our own version of the API functions b/c of the
PCI hostbridge does not provide the capability to map PCI I/O space
into the CPU's physical memory space. In addition, if a system has
more than 64M of PCI memory mapped BARs, PCI memory must also be
accessed indirectly.  This patch changes the assignment of PCI I/O
resources to fall into to 0x0000:0xffff range so that we can trap
I/O areas in our ioread/iowrite macros.

Signed-off-by: Deepak Saxena
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      450008b5
    • T
      [PATCH] ARM: 2791/1: Add CRCs for aliased ARM symbols · 7bc7fc50
      由 Todd Poynor 提交于 
      Patch from Todd Poynor

Fix module versioning for 3 ARM symbols that do not have CRCs added,
avoid "disagrees about version of symbol struct_module" errors at module
load time.  From David Singleton.
Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      7bc7fc50
    • S
      [PATCH] ARM: 2790/1: Properly terminate plat_serial8250_port arrays on ixdp425 and · bcaafbe4
      由 Stefan Sorensen 提交于 
      	coyote

Patch from Stefan Sorensen

On the ixdp425 and coyote platforms, the plat_serial8250_port arrays are
missing the terminating entry required by serial8250_probe.
Signed-off-by: NStefan Sorensen <ssoe@kirktelecom.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      bcaafbe4
    • C
      [PATCH] ARM: 2789/1: Enable access to both CP10 and CP11 on ARMv6 · d1d890ed
      由 Catalin Marinas 提交于 
      Patch from Catalin Marinas

The VFP instructions trigger undefined exceptions because the access to
CP11 is disabled (only CP10 is currently enabled by the kernel). The patch
fixes this problem.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d1d890ed
    • P
      [IA64] hotplug/ia64: SN Hotplug Driver: SN IRQ Fixes · cb4cb2cb
      由 Prarit Bhargava 提交于 
      This patch  fixes the SN IRQ code such that cpu affinity and
Hotplug can modify IRQ values.  The sn_irq_info structures are now locked
using a RCU lock mechanism to avoid lock contention in the lost interrupt
WAR code.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      cb4cb2cb
    • A
      [CRYPTO] Add x86_64 asm AES · a2a892a2
      由 Andreas Steinmetz 提交于 
      Implementation:
===============
The encrypt/decrypt code is based on an x86 implementation I did a while
ago which I never published. This unpublished implementation does
include an assembler based key schedule and precomputed tables. For
simplicity and best acceptance, however, I took Gladman's in-kernel code
for table generation and key schedule for the kernel port of my
assembler code and modified this code to produce the key schedule as
required by my assembler implementation. File locations and Kconfig are
kept similar to the i586 AES assembler implementation.
It may seem a little bit strange to use 32 bit I/O and registers in the
assembler implementation but this gives the best code size. My
implementation takes one instruction more per round compared to
Gladman's x86 assembler but it doesn't require any stack for local
variables or saved registers and it is less serialized than Gladman's
code.
Note that all comparisons to Gladman's code were done after my code was
implemented. I did only use FIPS PUB 197 for the implementation so my
implementation is independent work.
If anybody has a better assembler solution for x86_64 I'll be pleased to
have my code replaced with the better solution.

Testing:
========
The implementation passes the in-kernel crypto testing module and I'm
running it without any problems on my laptop where it is mainly used for
dm-crypt.

Microbenchmark:
===============
The microbenchmark was done in userspace with similar compile flags as
used during kernel compile.
Encrypt/decrypt is about 35% faster than the generic C implementation.
As the generic C as well as my assembler implementation are both table
I don't really expect that there is much room for further
improvements though I'll be glad to be corrected here.
The key schedule is about 5% slower than the generic C implementation.
This is due to the fact that some more work has to be done in the key
schedule routine to fit the schedule to the assembler implementation.

Code Size:
==========
Encrypt and decrypt are together about 2.1 Kbytes smaller than the
generic C implementation which is important with regard to L1 cache
usage. The key schedule routine is about 100 bytes larger than the
generic C implementation.

Data Size:
==========
There's no difference in data size requirements between the assembler
implementation and the generic C implementation.

License:
========
Gladmans's code is dual BSD/GPL whereas my assembler code is GPLv2 only
(I'm  not going to change the license for my code). So I had to change
the module license for the x86_64 aes module from 'Dual BSD/GPL' to
'GPL' to reflect the most restrictive license within the module.
Signed-off-by: NAndreas Steinmetz <ast@domdv.de>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a2a892a2
    • J
      [PATCH] openfirmware: generate device table for userspace · 5e655772
      由 Jeff Mahoney 提交于 
      This converts the usage of struct of_match to struct of_device_id,
similar to pci_device_id.  This allows a device table to be generated,
which can be parsed by depmod(8) to generate a map file for module
loading.

In order for hotplug to work with macio devices, patches to
module-init-tools and hotplug must be applied.  Those patches are
available at:

 ftp://ftp.suse.com/pub/people/jeffm/linux/macio-hotplug/Signed-off-by: NJeff Mahoney <jeffm@suse.com>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      5e655772