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  1. 15 5月, 2008 5 次提交
    • H
      [IA64] trivial cleanup for entry.S · 2e513fe4
      由 Hidetoshi Seto 提交于 
      This patch does:
 - make comment at next to resched check more robust
 - move "re-check" comments to next to where change predicate regs
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      2e513fe4
    • H
      [IA64] fix interrupt masking for pending works on kernel leave · 3633c730
      由 Hidetoshi Seto 提交于 
      [Bug-fix for "[BUG?][2.6.25-mm1] sleeping during IRQ disabled"]

This patch does:
 - enable interrupts before calling schedule() as same as others, ex. x86
 - enable interrupts during ia64_do_signal() and ia64_sync_krbs()
 - do_notify_resume_user() is still called with interrupts disabled, since
   we can take short path of fsys_mode if-statement quickly.
 - pfm_handle_work() is also called with interrupts disabled, since
   it can deal interrupt mask within itself.
 - fix/add some comments/notes
Reported-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      3633c730
    • A
      [IA64] allow user to force_pal_cache_flush · f13ae30e
      由 Alex Chiang 提交于 
      The sequence executed in check_sal_cache_flush:

	- pend a timer interrupt
	- call SAL_CACHE_FLUSH
	- see if interrupt is still pending

can hang HP machines with buggy SAL_CACHE_FLUSH implementations.

Provide a kernel command-line argument to allow users skip this
check if desired. Using this parameter will force ia64_sal_cache_flush
to call ia64_pal_cache_flush() instead of SAL_CACHE_FLUSH.
Signed-off-by: NAlex Chiang <achiang@hp.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      f13ae30e
    • B
      [IA64] Don't reserve crashkernel memory > 4 GB · 8a3360f0
      由 Bernhard Walle 提交于 
      Some IA64 machines map all cell-local memory above 4 GB (32 bit limit).
However, in most cases, the kernel needs some memory below that limit that is
DMA-capable. So in this machine configuration, the crashkernel will be reserved
above 4 GB.

For machines that use SWIOTLB implementation because they lack an I/O MMU
the low memory is required by the SWIOTLB implementation. In that case,
it doesn't make sense to reserve the crashkernel at all because it's unusable
for kdump.

A special case is the "hpzx1" machine vector. In theory, it has a I/O MMU, so
it can be booted above 4 GB. However, in the kdump case that is not possible
because of changeset 51b58e3e:

    On HP zx1 machines, the 'machvec=dig' parameter is needed for the kdump
    kernel to avoid problems with the HP sba iommu.  The problem is that during
    the boot of the kdump kernel, the iommu is re-initialized, so in-flight DMA
    from improperly shutdown drivers causes an IOTLB miss which leads to an
    MCA.  With kdump, the idea is to get into the kdump kernel with as little
    code as we can, so shutting down drivers properly is not an option.

    The workaround is to add 'machvec=dig' to the kdump kernel boot parameters.
    This makes the kdump kernel avoid using the sba iommu altogether, leaving
    the IOTLB intact.  Any ongoing DMA falls harmlessly outside the kdump
    kernel.  After the kdump kernel reboots, all devices will have been
    shutdown properly and DMA stopped.

This patch pushes that functionality into the sba iommu initialization
code, so that users won't have to find the obscure documentation telling
them about 'machvec=dig'.

This means that also for hpzx1 it's not possible to boot when all
memory is above the 4 GB limit. So the only machine vectors that can handle
this case are "sn2" and "uv".
Signed-off-by: NBernhard Walle <bwalle@suse.de>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      8a3360f0
    • J
      [IA64] machvec support for SGI UV platform · 22246614
      由 Jack Steiner 提交于 
      This patch adds the basic IA64 machvec infrastructure to support
the SGI "UV" platform.
Signed-off-by: NJack Steiner <steiner@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      22246614
  3. 02 5月, 2008 4 次提交
  5. 01 5月, 2008 5 次提交
  7. 30 4月, 2008 6 次提交
  9. 29 4月, 2008 6 次提交
  11. 28 4月, 2008 1 次提交
  13. 27 4月, 2008 13 次提交