1. 10 11月, 2012 4 次提交
  2. 29 10月, 2012 2 次提交
  3. 28 10月, 2012 2 次提交
    • D
      sparc64: Use pause instruction when available. · e9b9eb59
      David S. Miller 提交于
      In atomic backoff and cpu_relax(), use the pause instruction
      found on SPARC-T4 and later.
      
      It makes the cpu strand unselectable for the given number of
      cycles, unless an intervening disrupting trap occurs.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e9b9eb59
    • D
      sparc64: Fix cpu strand yielding. · 270c10e0
      David S. Miller 提交于
      For atomic backoff, we just loop over an exponentially backed off
      counter.  This is extremely ineffective as it doesn't actually yield
      the cpu strand so that other competing strands can use the cpu core.
      
      In cpus previous to SPARC-T4 we have to do this in a slightly hackish
      way, by doing an operation with no side effects that also happens to
      mark the strand as unavailable.
      
      The mechanism we choose for this is three reads of the %ccr
      (condition-code) register into %g0 (the zero register).
      
      SPARC-T4 has an explicit "pause" instruction, and we'll make use of
      that in a subsequent commit.
      
      Yield strands also in cpu_relax().  We really should have done this a
      very long time ago.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      270c10e0
  4. 27 10月, 2012 1 次提交
    • D
      sparc64: Make montmul/montsqr/mpmul usable in 32-bit threads. · 517ffce4
      David S. Miller 提交于
      The Montgomery Multiply, Montgomery Square, and Multiple-Precision
      Multiply instructions work by loading a combination of the floating
      point and multiple register windows worth of integer registers
      with the inputs.
      
      These values are 64-bit.  But for 32-bit userland processes we only
      save the low 32-bits of each integer register during a register spill.
      This is because the register window save area is in the user stack and
      has a fixed layout.
      
      Therefore, the only way to use these instruction in 32-bit mode is to
      perform the following sequence:
      
      1) Load the top-32bits of a choosen integer register with a sentinel,
         say "-1".  This will be in the outer-most register window.
      
         The idea is that we're trying to see if the outer-most register
         window gets spilled, and thus the 64-bit values were truncated.
      
      2) Load all the inputs for the montmul/montsqr/mpmul instruction,
         down to the inner-most register window.
      
      3) Execute the opcode.
      
      4) Traverse back up to the outer-most register window.
      
      5) Check the sentinel, if it's still "-1" store the results.
         Otherwise retry the entire sequence.
      
      This retry is extremely troublesome.  If you're just unlucky and an
      interrupt or other trap happens, it'll push that outer-most window to
      the stack and clear the sentinel when we restore it.
      
      We could retry forever and never make forward progress if interrupts
      arrive at a fast enough rate (consider perf events as one example).
      So we have do limited retries and fallback to software which is
      extremely non-deterministic.
      
      Luckily it's very straightforward to provide a mechanism to let
      32-bit applications use a 64-bit stack.  Stacks in 64-bit mode are
      biased by 2047 bytes, which means that the lowest bit is set in the
      actual %sp register value.
      
      So if we see bit zero set in a 32-bit application's stack we treat
      it like a 64-bit stack.
      
      Runtime detection of such a facility is tricky, and cumbersome at
      best.  For example, just trying to use a biased stack and seeing if it
      works is hard to recover from (the signal handler will need to use an
      alt stack, plus something along the lines of longjmp).  Therefore, we
      add a system call to report a bitmask of arch specific features like
      this in a cheap and less hairy way.
      
      With help from Andy Polyakov.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      517ffce4
  5. 26 10月, 2012 3 次提交
  6. 25 10月, 2012 4 次提交
  7. 24 10月, 2012 16 次提交
  8. 23 10月, 2012 7 次提交
    • C
      arch/tile: avoid build warnings from duplicate ELF_R_xxx #defines · 78059633
      Chris Metcalf 提交于
      These are now provided in <asm-generic/module.h>, so clean up warnings
      by not re-defining them in module.c.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Acked-by: NRusty Russell <rusty@rustcorp.com.au>
      78059633
    • C
      arch/tile: avoid generating .eh_frame information in modules · 627072b0
      Chris Metcalf 提交于
      The tile tool chain uses the .eh_frame information for backtracing.
      The vmlinux build drops any .eh_frame sections at link time, but when
      present in kernel modules, it causes a module load failure due to the
      presence of unsupported pc-relative relocations.  When compiling to
      use compiler feedback support, the compiler by default omits .eh_frame
      information, so we don't see this problem.  But when not using feedback,
      we need to explicitly suppress the .eh_frame.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Cc: stable@vger.kernel.org
      627072b0
    • M
      ARM: dma-mapping: support debug_dma_mapping_error · 871ae57a
      Ming Lei 提交于
      Without the patch, kind of below warning will be dumped if DMA-API
      debug is enabled:
      
      [   11.069763] ------------[ cut here ]------------
      [   11.074645] WARNING: at lib/dma-debug.c:948 check_unmap+0x770/0x860()
      [   11.081420] ehci-omap ehci-omap.0: DMA-API: device driver failed to
      check map error[device address=0x0000000
      0adb78e80] [size=8 bytes] [mapped as single]
      [   11.095611] Modules linked in:
      
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Marek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NMing Lei <ming.lei@canonical.com>
      Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      871ae57a
    • R
      ARM: drop experimental status for hotplug and Thumb2 · 00b7dede
      Russell King 提交于
      Both these features have been around for a long time now, and haven't
      had any recent issues brought up.  So lets drop their experimental
      status.
      
      In any case, hotplugis  selected by other non-experimental options
      which then cause a Kconfig warning.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      00b7dede
    • S
      KVM guest: exit idleness when handling KVM_PV_REASON_PAGE_NOT_PRESENT · c5e015d4
      Sasha Levin 提交于
      KVM_PV_REASON_PAGE_NOT_PRESENT kicks cpu out of idleness, but we haven't
      marked that spot as an exit from idleness.
      
      Not doing so can cause RCU warnings such as:
      
      [  732.788386] ===============================
      [  732.789803] [ INFO: suspicious RCU usage. ]
      [  732.790032] 3.7.0-rc1-next-20121019-sasha-00002-g6d8d02d-dirty #63 Tainted: G        W
      [  732.790032] -------------------------------
      [  732.790032] include/linux/rcupdate.h:738 rcu_read_lock() used illegally while idle!
      [  732.790032]
      [  732.790032] other info that might help us debug this:
      [  732.790032]
      [  732.790032]
      [  732.790032] RCU used illegally from idle CPU!
      [  732.790032] rcu_scheduler_active = 1, debug_locks = 1
      [  732.790032] RCU used illegally from extended quiescent state!
      [  732.790032] 2 locks held by trinity-child31/8252:
      [  732.790032]  #0:  (&rq->lock){-.-.-.}, at: [<ffffffff83a67528>] __schedule+0x178/0x8f0
      [  732.790032]  #1:  (rcu_read_lock){.+.+..}, at: [<ffffffff81152bde>] cpuacct_charge+0xe/0x200
      [  732.790032]
      [  732.790032] stack backtrace:
      [  732.790032] Pid: 8252, comm: trinity-child31 Tainted: G        W    3.7.0-rc1-next-20121019-sasha-00002-g6d8d02d-dirty #63
      [  732.790032] Call Trace:
      [  732.790032]  [<ffffffff8118266b>] lockdep_rcu_suspicious+0x10b/0x120
      [  732.790032]  [<ffffffff81152c60>] cpuacct_charge+0x90/0x200
      [  732.790032]  [<ffffffff81152bde>] ? cpuacct_charge+0xe/0x200
      [  732.790032]  [<ffffffff81158093>] update_curr+0x1a3/0x270
      [  732.790032]  [<ffffffff81158a6a>] dequeue_entity+0x2a/0x210
      [  732.790032]  [<ffffffff81158ea5>] dequeue_task_fair+0x45/0x130
      [  732.790032]  [<ffffffff8114ae29>] dequeue_task+0x89/0xa0
      [  732.790032]  [<ffffffff8114bb9e>] deactivate_task+0x1e/0x20
      [  732.790032]  [<ffffffff83a67c29>] __schedule+0x879/0x8f0
      [  732.790032]  [<ffffffff8117e20d>] ? trace_hardirqs_off+0xd/0x10
      [  732.790032]  [<ffffffff810a37a5>] ? kvm_async_pf_task_wait+0x1d5/0x2b0
      [  732.790032]  [<ffffffff83a67cf5>] schedule+0x55/0x60
      [  732.790032]  [<ffffffff810a37c4>] kvm_async_pf_task_wait+0x1f4/0x2b0
      [  732.790032]  [<ffffffff81139e50>] ? abort_exclusive_wait+0xb0/0xb0
      [  732.790032]  [<ffffffff81139c25>] ? prepare_to_wait+0x25/0x90
      [  732.790032]  [<ffffffff810a3a66>] do_async_page_fault+0x56/0xa0
      [  732.790032]  [<ffffffff83a6a6e8>] async_page_fault+0x28/0x30
      Signed-off-by: NSasha Levin <sasha.levin@oracle.com>
      Acked-by: NGleb Natapov <gleb@redhat.com>
      Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      c5e015d4
    • G
      7f46ddbd
    • X
      KVM: MMU: fix release noslot pfn · f3ac1a4b
      Xiao Guangrong 提交于
      We can not directly call kvm_release_pfn_clean to release the pfn
      since we can meet noslot pfn which is used to cache mmio info into
      spte
      Signed-off-by: NXiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      f3ac1a4b
  9. 22 10月, 2012 1 次提交