- 07 11月, 2017 10 次提交
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由 Mika Westerberg 提交于
The same problem that we have with bus space applies to other resources as well. Linux only allocates the minimal amount of resources so that the devices currently present barely fit there. This prevents extending the chain later on because the resource windows allocated for hotplug downstream ports are too small. Follow what we already did for bus number and assign all available extra resources to hotplug-capable bridges. This makes it possible to extend the hierarchy later. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Mika Westerberg 提交于
System BIOS sometimes allocates extra bus space for hotplug-capable PCIe root/downstream ports. This space is needed if the device plugged to the port will have more hotplug-capable downstream ports. A good example of this is Thunderbolt. Each Thunderbolt device contains a PCIe switch and one or more hotplug-capable PCIe downstream ports where the daisy chain can be extended. Currently Linux only allocates minimal bus space to make sure all the enumerated devices barely fit there. The BIOS reserved extra space is not taken into consideration at all. Because of this we run out of bus space pretty quickly when more PCIe devices are attached to hotplug downstream ports in order to extend the chain. Modify the PCI core so we distribute the available BIOS allocated bus space equally between hotplug-capable bridges to make sure there is enough bus space for extending the hierarchy later on. Update kernel docs of the affected functions. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Mika Westerberg 提交于
One can ask more buses to be reserved for hotplug bridges by passing pci=hpbussize=N in the kernel command line. If the parent bus does not have enough bus space available we incorrectly create child bus with the requested number of subordinate buses. In the example below hpbussize is set to one more than we have available buses in the root port: pci 0000:07:00.0: [8086:1578] type 01 class 0x060400 pci 0000:07:00.0: scanning [bus 00-00] behind bridge, pass 0 pci 0000:07:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:07:00.0: scanning [bus 00-00] behind bridge, pass 1 pci_bus 0000:08: busn_res: can not insert [bus 08-ff] under [bus 07-3f] (conflicts with (null) [bus 07-3f]) pci_bus 0000:08: scanning bus ... pci_bus 0000:0a: bus scan returning with max=40 pci_bus 0000:0a: busn_res: [bus 0a-ff] end is updated to 40 pci_bus 0000:0a: [bus 0a-40] partially hidden behind bridge 0000:07 [bus 07-3f] pci_bus 0000:08: bus scan returning with max=40 pci_bus 0000:08: busn_res: [bus 08-ff] end is updated to 40 Instead of allowing this, limit the subordinate number to be less than or equal the maximum subordinate number allocated for the parent bus (if it has any). Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: remove irrelevant dmesg messages] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Mika Westerberg 提交于
The current scanning code is really hard to understand because it calls the same function in a loop where pass value is changed without any comments explaining it: for (pass = 0; pass < 2; pass++) for_each_pci_bridge(dev, bus) max = pci_scan_bridge(bus, dev, max, pass); Unfamiliar reader cannot tell easily what is the purpose of this loop without looking at internals of pci_scan_bridge(). In order to make this bit easier to understand, open-code the loop in pci_scan_child_bus() and pci_hp_add_bridge() with added comments. No functional changes intended. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Mika Westerberg 提交于
There is not much point of having a file with a single function in it. Instead we can just move pci_hp_add_bridge() to drivers/pci/probe.c and make it available always when PCI core is enabled. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> [bhelgaas: convert printk to dev_err()] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Andy Shevchenko 提交于
The following pattern is often used: list_for_each_entry(dev, &bus->devices, bus_list) { if (pci_is_bridge(dev)) { ... } } Add a for_each_pci_bridge() helper to make that code easier to write and read by reducing indentation level. It also saves one or few lines of code in each occurrence. Convert PCI core parts here at the same time. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> [bhelgaas: fold in http://lkml.kernel.org/r/20171013165352.25550-1-andriy.shevchenko@linux.intel.com] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Kees Cook 提交于
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Signed-off-by: NKees Cook <keescook@chromium.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Quentin Lambert <lambert.quentin@gmail.com> Cc: Aleksandr Bezzubikov <zuban32s@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com>
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由 Kees Cook 提交于
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. This has the result of fixing pushbutton_helper_thread(), which was truncating the event pointer to 32 bits. Signed-off-by: NKees Cook <keescook@chromium.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: Quentin Lambert <lambert.quentin@gmail.com> Cc: Aleksandr Bezzubikov <zuban32s@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com>
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由 Kees Cook 提交于
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. This fixes what appears to be a bug in passing the wrong pointer to the timer handler (address of ctrl pointer instead of ctrl pointer). Signed-off-by: NKees Cook <keescook@chromium.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Mayurkumar Patel <mayurkumar.patel@intel.com> Cc: Keith Busch <keith.busch@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Markus Elfring 提交于
Combine two error paths that emit the same message and return the same error code. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> [bhelgaas: changelog] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 26 9月, 2017 1 次提交
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由 Nicolai Stange 提交于
The driver_override implementation is susceptible to a race condition when different threads are reading vs. storing a different driver override. Add locking to avoid the race condition. This is in close analogy to commit 62655397 ("driver core: platform: fix race condition with driver_override") from Adrian Salido. Fixes: 782a985d ("PCI: Introduce new device binding path using pci_dev.driver_override") Signed-off-by: NNicolai Stange <nstange@suse.de> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org # v3.16+
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- 21 9月, 2017 1 次提交
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由 John Keeping 提交于
pci_epf_test_raise_irq() reads the interrupt to use for the response from reg->command, but this has been cleared at the beginning of the command handler so the value is always zero at this point. Instead, extract the interrupt index before handling the command and then pass the requested interrupt into pci_epf_test_raise_irq(). This allows us to remove the specific code to extract the interrupt for COMMAND_RAISE_MSI_IRQ since it is now handled in common code. Fixes: 3ecf3232 ("PCI: endpoint: Do not reset *command* inadvertently") Signed-off-by: NJohn Keeping <john@metanate.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
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- 15 9月, 2017 1 次提交
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由 Bjorn Helgaas 提交于
This reverts commit 40f11adc. Jens found that iwlwifi firmware loading failed on a Lenovo X1 Carbon, gen4: iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-8000C-34.ucode failed with error -2 iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-8000C-33.ucode failed with error -2 iwlwifi 0000:04:00.0: Direct firmware load for iwlwifi-8000C-32.ucode failed with error -2 iwlwifi 0000:04:00.0: loaded firmware version 31.532993.0 op_mode iwlmvm iwlwifi 0000:04:00.0: Detected Intel(R) Dual Band Wireless AC 8260, REV=0x208 ... iwlwifi 0000:04:00.0: Failed to load firmware chunk! iwlwifi 0000:04:00.0: Could not load the [0] uCode section iwlwifi 0000:04:00.0: Failed to start INIT ucode: -110 iwlwifi 0000:04:00.0: Failed to run INIT ucode: -110 He bisected it to 40f11adc ("PCI: Avoid race while enabling upstream bridges"). Revert that commit to fix the regression. Link: http://lkml.kernel.org/r/4bcbcbc1-7c79-09f0-5071-bc2f53bf6574@kernel.dk Fixes: 40f11adc ("PCI: Avoid race while enabling upstream bridges") Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Srinath Mannam <srinath.mannam@broadcom.com> CC: Jens Axboe <axboe@kernel.dk> CC: Luca Coelho <luca@coelho.fi> CC: Johannes Berg <johannes@sipsolutions.net> CC: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 14 9月, 2017 1 次提交
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由 Christoph Hellwig 提交于
... and __initconst if applicable. Based on similar work for an older kernel in the Grsecurity patch. [JD: fix toshiba-wmi build] [JD: add htcpen] [JD: move __initconst where checkscript wants it] Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NJean Delvare <jdelvare@suse.de>
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- 07 9月, 2017 3 次提交
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由 Bjorn Helgaas 提交于
Use tabs (not spaces) for indentation. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Bjorn Helgaas 提交于
Apparently the PCIe capability is at address 0x40 in config space of X-Gene v1 Root Ports. Add a definition of that and use the generic PCI_EXP_RTCTL offset into the capability. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Fabio Estevam 提交于
When platform_get_irq() fails we should propagate the real error value instead of always returning -EINVAL. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Duc Dang <dhdang@apm.com>
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- 06 9月, 2017 11 次提交
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由 Fabio Estevam 提交于
When platform_get_irq() fails we should propagate the real error value instead of always returning -EINVAL. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Michal Simek <michal.simek@xilinx.com>
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由 Fabio Estevam 提交于
When platform_get_irq() fails we should propagate the real error value instead of always returning -EINVAL. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Shawn Lin <shawn.lin@rock-chips.com>
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由 Fabio Estevam 提交于
platform_get_irq() returns a negative number on failure, so adjust the logic to detect such condition and propagate the real error value on failure. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Ley Foon Tan <lftan@altera.com>
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由 Fabio Estevam 提交于
platform_get_irq() returns a negative number on failure, so adjust the logic to detect such condition and propagate the real error value on failure. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Pratyush Anand <pratyush.anand@gmail.com>
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由 Fabio Estevam 提交于
platform_get_irq() returns a negative number on failure, so adjust the logic to detect such condition and propagate the real error value on failure. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NNiklas Cassel <niklas.cassel@axis.com>
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由 Fabio Estevam 提交于
platform_get_irq() returns a negative number on failure, so adjust the logic to detect such condition and propagate the real error value on failure. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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由 Fabio Estevam 提交于
When platform_get_irq() fails we should propagate the real error value instead of always returning -EINVAL. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Fabio Estevam 提交于
platform_get_irq() returns a negative number on failure, so adjust the logic to detect such condition and propagate the real error value on failure. Reported-by: NBjorn Helgaas <helgaas@kernel.org> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJingoo Han <jingoohan1@gmail.com>
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由 Bjorn Helgaas 提交于
Use tabs (not spaces) for indentation. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Bjorn Helgaas 提交于
PCI_EXP_CAP is an iProc-specific value, so rename it to IPROC_PCI_EXP_CAP to make it obvious that it's not related to the generic values like PCI_EXP_RTCTL, etc. No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Oza Pawandeep 提交于
During soft reset (e.g., "reboot" from Linux) on some iProc-based SOCs, the LCPLL clock and PERST both go off simultaneously. This seems in accordance with the PCIe Card Electromechanical spec, r2.0, sec 2.2.3, which says the clock goes inactive after PERST# goes active, but doesn't specify how long the clock should be valid after PERST#. However, we have observed that with the iProc Stingray, some Intel NVMe endpoints, e.g., the P3700 400GB series, are not detected correctly upon the next boot sequence unless the clock remains valid for some time after PERST# is asserted. Delay 500ms after asserting PERST# before performing a reboot. The 500ms is experimentally determined. Signed-off-by: NOza Pawandeep <oza.oza@broadcom.com> [bhelgaas: changelog, add spec reference, fold in iproc_pcie_shutdown() export from Arnd Bergmann <arnd@arndb.de>] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NRay Jui <ray.jui@broadcom.com> Reviewed-by: NScott Branden <scott.branden@broadcom.com>
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- 02 9月, 2017 2 次提交
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由 Bjorn Helgaas 提交于
Fix various typos and whitespace errors: s/Synopsis/Synopsys/ s/Designware/DesignWare/ s/Keystine/Keystone/ s/gpio/GPIO/ s/pcie/PCIe/ s/phy/PHY/ s/confgiruation/configuration/ No functional change intended. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Shawn Lin 提交于
The "res" variable in pci_resource_io() is never used. Remove it. Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 31 8月, 2017 2 次提交
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由 Jon Derrick 提交于
VMD currently only exists for Intel x86 products, so move the VMD quirk to arch/x86. Signed-off-by: NJon Derrick <jonathan.derrick@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Keith Busch 提交于
VMD hardware has to share its vectors among child devices in its PCI domain so we should allocate as many as possible rather than just ones that can be affinitized. pci_alloc_irq_vectors_affinity() limits the number of affinitized IRQs to the number of present CPUs (see irq_calc_affinity_vectors()). But we'd prefer to have more vectors, even if they aren't distributed across the CPUs, so use pci_alloc_irq_vectors() instead. Reported-by: NBrad Goodman <Bradley.Goodman@dell.com> Signed-off-by: NKeith Busch <keith.busch@intel.com> [bhelgaas: add irq_calc_affinity_vectors() reference to changelog] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 30 8月, 2017 8 次提交
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由 Honghui Zhang 提交于
Switch from using custom INTX_NUM macro to the generic PCI_NUM_INTX definition for the number of INTx interrupts. Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> [bhelgaas: use subject/changelog from similar patches] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Honghui Zhang 提交于
MT2712 and MT7622's PCIe host controller support MSI, but only 32-bit MSI addresses are supported. It connects to GIC with the same IRQ number as the INTx IRQ, so it shares the same IRQ with INTx IRQ. Add MSI support for MT2712 and MT7622. Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> [bhelgaas: changes to follow rcar & tegra: rename to mtk_pcie_msi_alloc(), add mtk_pcie_msi_free(), free hwirq if irq_create_mapping() fails, call irq_dispose_mapping() from mtk_msi_teardown_irq()] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRyder Lee <ryder.lee@mediatek.com>
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由 Honghui Zhang 提交于
75983c6d1f38 ("PCI: mediatek: Add controller support for MT2712 and MT7622") has put the mtk_pcie * into bus->sysdata. Take advantage of that to get the private data and simplify the code. Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRyder Lee <ryder.lee@mediatek.com> -
由 Ryder Lee 提交于
MT2712 and MT7622 using a new IP block of Gen2 controller which has two root ports and shares the same probing flow with MT2701/MT7623. Both MT2712 and MT7622 have the same per-port control registers, but there are slight differences between them: - MT7622 has more clocks than MT2712. - MT7622 has shared control registers which are used to enable LTSSM and ASPM while MT2712 does not. Add host controller support for MT2712/MT7622. Signed-off-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> [bhelgaas: folded in fix from http://lkml.kernel.org/r/1502715868-17651-2-git-send-email-honghui.zhang@mediatek.com] Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> -
由 Ryder Lee 提交于
This is a transitional patch. We currently use platfarm_get_resource() for retrieving the IOMEM resources, but there might be some chips don't have subsys/shared registers part, which depends on platform design, and these will be introduced in further patches. Switch this function to use the platform_get_resource_byname() so that the binding can be agnostic of the resource order. Signed-off-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Honghui Zhang 提交于
Introduce a structure "mtk_pcie_soc" to abstract the differences between controller generations, and the .startup() hook is used to encapsulate some SoC-dependent related setting. In doing so, the common code which will be reused by future chips. Signed-off-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Honghui Zhang 提交于
Rename "port->index" to "port->slot" since the ports are hardwired at PCI_SLOT. Also rename "mtk_pcie_parse_ports()" to "mtk_pcie_parse_port()" since it parses one port each time. No functional change in this patch. Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Ryder Lee 提交于
Wait for Gen2 training with readl_poll_timeout(), and simplify the hardware assert logical by merging it into a new mtk_pcie_startup_port() interface. Signed-off-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NHonghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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