Homogenize namespace to atmci.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Boards used to specify zreladdr in their Makefile.boot with
zreladdr-y := x, so conflicting zreladdrs were silently overwritten.
This patch changes this to zreladdr-y += x, so that we end
up with multiple words in zreladdr in such a case. We can
detect this later and complain if necessary.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

For the new hw_random driver.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use.  Let's give their
addruart macro some slack by providing an extra work register which will
allow for much needed cleanups.

This is basically a no-op as this commit is only adding the extra argument
to the macro but no one is using it yet.
Signed-off-by: Nnicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NKevin Hilman <khilman@ti.com>

As a new overcurrent_pin[] array has been added to the at91_usbh_data
structure, those pins must be muxed to work properly. This commit
implements this muxing for all AT91 SoCs that support the AT91 OHCI.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
[nicolas.ferre@atmel.com: added i variable declaration for the loop]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Several USB power switches (AIC1526 or MIC2026) have a digital output
that is used to notify that an overcurrent situation is taking
place. This digital outputs are typically connected to GPIO inputs of
the processor and can be used to be notified of those overcurrent
situations.

Therefore, we add a new overcurrent_pin[] array in the at91_usbh_data
structure so that boards can tell the AT91 OHCI driver which pins are
used for the overcurrent notification, and an overcurrent_supported
boolean to tell the driver whether overcurrent is supported or not.

The code has been largely borrowed from ohci-da8xx.c and
ohci-s3c2410.c.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The existing OHCI AT91 driver made the assumption that the enable
input of the USB power switch was active low. However, some USB power
switches such as the Micrel MIC2026-1 [1] have an active high input to
enable the power. A new vbus_pin_inverted attribute is added to the
at91_usbh_data structure so that board files can tell the OHCI driver
if the vbus pin logic is active low or active high.

[1] http://www.micrel.com/page.do?page=product-info/products/mic2026.shtmlSigned-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Remove the cpu_is_at91xxxx() macros in the ohci-at91 driver.
SoCs at91sam9261 and at91sam9g10 expect one additional clock: hck0.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add support for Calao USB-A9G20 boards. It will be integrated in
existing support for board of same form factor using at91sam9260 or
at91sam9263.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Merge boards together as they are barely the same.
Signed-off-by: NNico Erfurth <ne@erfurth.eu>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: updated to new machine_desc structure]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: Gregory Hermant <gregory.hermant@calao-systems.com>

This adds support for the RSI EWS machine (at91rm9200-based),
machine type 1609.

Includes fixes as suggested by Uwe Kleine-König and
cleanups as suggested by Russell and R.Schwebel.
Signed-off-by: NJosef Holzmayr <holzmayr@rsi-elektrotechnik.de>
[nicolas.ferre@atmel.com: simplify board file header, move to at91_init_irq_default]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This was a typo in clockdev declaration for at91sam9261 SoC.
Fix the kernel hanging when switching clocksource to TC (tcb_clksrc).
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRemy Bohmer <linux@bohmer.net>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Ferre<nicolas.ferre@atmel.com>

Rather than marking the mach/gpio.h header files which want to use the
trivial GPIOLIB implementation, mark those which do not want to use it
instead.  This means that by default, you get the trivial implementation
and only have to do something extra if you need to.  This should
encourage the use of the trivial default implementation.

As an additional bonus, several gpio.h header files become empty.
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Consolidate 24 trivial gpiolib implementions out of mach/gpio.h
into asm/gpio.h.  This is basically the include of asm-generic/gpio.h
and the definition of gpio_get_value, gpio_set_value, and gpio_cansleep
as described in Documentation/gpio.txt
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: NDavid Brown <davidb@codeaurora.org>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Tested-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert arch/arm includes of mach/gpio.h and asm/gpio.h to linux/gpio.h
before we start consolidating the individual platform implementations
of the gpio header files.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

asm/gpio.h already directly includes mach/gpio.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

instead of reading the registers everytime

the current implementation respect the following constrain:
 - allow 1 to n soc to be enabled
 - allow to have a virtual cpu type and subtype
 - always detect the cpu type and subtype and report it
 - detect if the soc support is enabled
 - prepare for sysfs export support
 - drop soc specific code via compiler when the soc not enabled
   (via cpu_is_xxx)

Today if we read the exid we will have the same value for 9g35 and 9m11
and we will need to check the cidr too

with the new implementation we just need to check the soc subtype

this will also allow to have specific virtual subtype for rm9200 which the
board will have to specify via at91rm9200_set_type(int) as we have no way to
detect it.

this implementation is inspired by the SH cpu detection support
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

to make the soc base specified at runtime instead of compiled time
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

they are the same except the default priority
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.

On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000

This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

This allows us to move duplicated code in <asm/atomic.h>
(atomic_inc_not_zero() for now) to <linux/atomic.h>
Signed-off-by: NArun Sharma <asharma@fb.com>
Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Miller <davem@davemloft.net>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

move register header to drivers
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Now most of ARM machines has the alsmot same __clk_get/put() macro

So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files

But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config

Now there are only 3 caese.

1) define the clk structure with clkdev macro => Need to move clk structure to proper header file

arch/arm/mach-versatile/include/mach/clkdev.h
arch/arm/mach-realview/include/mach/clkdev.h
arch/arm/mach-vexpress/include/mach/clkdev.h
arch/arm/mach-integrator/include/mach/clkdev.h

2) export the __clk_get/put function at clock.c

arch/arm/mach-shmobile/include/mach/clkdev.h

3) demuxing the clk source
arch/arm/mach-u300/include/mach/clkdev.h
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

The recently modified nand buswitth configuration is not aligned with
board reality: the double footprint on boards is always populated with 8bits
buswidth nand flashes.
So we have to consider that without particular configuration the 8bits
buswidth is selected by default.
Moreover, the previous logic was always using !board_have_nand_8bit(), we
change it to a simpler: board_have_nand_16bit().
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Hello,

I am not 100% sure this is the right thing to do, but it makes the
atmel-ssc driver happy on my at91rm9200 board.

This unifies the con_id across all at91 machines.

The atmel-ssc driver expects the con_id to be "pclk" or it will fail probing.
Signed-off-by: NJoachim Eastwood <joachim.eastwood@jotron.com>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

I no longer work at Bluewater Systems. Update my email address accordingly. I
have deleted my email address from C files rather than change it. This
was suggested by several people, since the commit from my new email
address will cause scripts/get_maintainer.pl to function properly. I
have not added the .mailmap entry as suggested by Joe because I think
it is no longer necessary if I touch all the files which had my name
in them.
Signed-off-by: NRyan Mallon <rmallon@gmail.com>
Cc: Andre Renaud <andre@bluewatersys.com>
Cc: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Andrew Victor <avictor.za@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Anton Vorontsov <cbou@mail.ru>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Liam Girdwood <lrg@ti.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Joe Perches <joe@perches.com>
Cc: Jesper Juhl <jj@chaosbits.net>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: trivial@kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: NJesper Juhl <jj@chaosbits.net>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Several fixes as well where the +1 was missing.

Done via coccinelle scripts like:

@@
struct resource *ptr;
@@

- ptr->end - ptr->start + 1
+ resource_size(ptr)

and some grep and typing.

Mostly uncompiled, no cross-compilers.
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

no-one use it and it's nearly impossible get a board to work on it
and the Mainline implementation was never finished
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>

as we can not detect it
by defaut the type will be bga
introduce cpu_is_at91rm9200_bga and cpu_is_at91rm9200_pqfp
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>

select ARM_PATCH_PHYS_VIRT
as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent
bootloader will provide a valid atags pointer in r2

as point out by Russell on AT91 we never use XIP
so se do not need PLAT_PHYS_OFFSET
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>

we do not change the clock naming convention so does not need to switch
the AVR32 yet
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>