- 24 11月, 2009 1 次提交
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由 Jan Beulich 提交于
irq_thermal_count is only being maintained when X86_THERMAL_VECTOR, and both X86_THERMAL_VECTOR and X86_MCE_THRESHOLD don't need extra wrapping in X86_MCE conditionals. Signed-off-by: NJan Beulich <jbeulich@novell.com> Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Cc: Arjan van de Ven <arjan@infradead.org> LKML-Reference: <4B06AFA902000078000211F8@vpn.id2.novell.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 12 11月, 2009 1 次提交
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由 Hidetoshi Seto 提交于
The intel_init_thermal() is called from resume path, so it cannot be marked as __init. OTOH mce_banks_init() is only called from __mcheck_cpu_cap_init() which is marked as __cpuinit, so it can be also marked as __cpuinit. Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Acked-by: NYong Wang <yong.y.wang@linux.intel.com> LKML-Reference: <4AFBB0B8.2070501@jp.fujitsu.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 11 11月, 2009 1 次提交
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由 Yong Wang 提交于
Mark the thermal init functions __init so that the init memory can be freed. Signed-off-by: NYong Wang <yong.y.wang@intel.com> LKML-Reference: <20091111075125.GA17900@ywang-moblin2.bj.intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 10 11月, 2009 1 次提交
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由 Yong Wang 提交于
On platforms where the BIOS handles the thermal monitor interrupt, APIC_LVTTHMR on each logical CPU is programmed to generate a SMI and OS must not touch it. Unfortunately AP bringup sequence using INIT-SIPI-SIPI clears all the LVT entries except the mask bit. Essentially this results in all LVT entries including the thermal monitoring interrupt set to masked (clearing the bios programmed value for APIC_LVTTHMR). And this leads to kernel take over the thermal monitoring interrupt on AP's but not on BSP (leaving the bios programmed value only on BSP). As a result of this, we have seen system hangs when the thermal monitoring interrupt is generated. Fix this by reading the initial value of thermal LVT entry on BSP and if bios has taken over the control, then program the same value on all AP's and leave the thermal monitoring interrupt control on all the logical cpu's to the bios. Signed-off-by: NYong Wang <yong.y.wang@intel.com> Reviewed-by: NSuresh Siddha <suresh.b.siddha@intel.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Cc: Arjan van de Ven <arjan@infradead.org> LKML-Reference: <20091110013824.GA24940@ywang-moblin2.bj.intel.com> Signed-off-by: NIngo Molnar <mingo@elte.hu> Cc: stable@kernel.org
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- 16 10月, 2009 5 次提交
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由 Borislav Petkov 提交于
Add an early initcall (pre SMP) which sets up global MCE functionality. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <1255689093-26921-2-git-send-email-borislav.petkov@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Borislav Petkov 提交于
Prefix global/setup routines with "mcheck_" thus differentiating from the internal facilities prefixed with "mce_". Also, prefix the per cpu calls with mcheck_cpu and rename them to reflect the MCE setup hierarchy of calls better. There should be no functionality change resulting from this patch. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <1255689093-26921-1-git-send-email-borislav.petkov@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Roland Dreier 提交于
The MCE initialization code explicitly says it doesn't handle asymmetric configurations where different CPUs support different numbers of MCE banks, and it prints a big warning in that case. Therefore, printing the "mce: CPU supports <x> MCE banks" message into the kernel log for every CPU is pure redundancy that clutters the log significantly for systems with lots of CPUs. Signed-off-by: NRoland Dreier <rolandd@cisco.com> LKML-Reference: <adaeip473qt.fsf@cisco.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Robin Holt 提交于
A few parts of the uv_hub_info structure are initialized incorrectly. - n_val is being loaded with m_val. - gpa_mask is initialized with a bytes instead of an unsigned long. - Handle the case where none of the alias registers are used. Lastly I converted the bau over to using the uv_hub_info->m_val which is the correct value. Without this patch, booting a large configuration hits a problem where the upper bits of the gnode affect the pnode and the bau will not operate. Signed-off-by: NRobin Holt <holt@sgi.com> Acked-by: NJack Steiner <steiner@sgi.com> Cc: Cliff Whickman <cpw@sgi.com> Cc: stable@kernel.org LKML-Reference: <20091015224946.396355000@alcatraz.americas.sgi.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
Older binutils breaks if ASSERT() is used without a sink for the output. For example 2.14.90.0.6 is known to be broken, the link fails with: LD .tmp_vmlinux1 ld:arch/x86/kernel/vmlinux.lds:678: parse error Document this quirk in all three files that use it. See: http://marc.info/?l=linux-kbuild&m=124930110427870&w=2 See[2]: d2ba8b21 ("x86: Fix assert syntax in vmlinux.lds.S") Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Roland McGrath <roland@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Sam Ravnborg <sam@ravnborg.org> LKML-Reference: <4AD6523D.5030909@zytor.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 15 10月, 2009 9 次提交
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由 Ingo Molnar 提交于
This reverts commit e9a63a4e. This breaks older binutils, where sink-less asserts are broken. See this commit for further details: d2ba8b21: x86: Fix assert syntax in vmlinux.lds.S Acked-by: N"H. Peter Anvin" <hpa@zytor.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <4AD6523D.5030909@zytor.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Paul Walmsley 提交于
clock24xx.c is missing a omap2_init_clk_clkdm() in its omap2_clk_init() function. Among other bad effects, this causes the OMAP hwmod layer to oops on boot. Thanks to Carlos Aguiar <carlos.aguiar@indt.org.br> and Stefano Panella <Stefano.Panella@csr.com> for reporting this bug. Thanks to Tony Lindgren <tony@atomide.com> for N800 booting advice. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Carlos Aguiar <carlos.aguiar@indt.org.br> Cc: Stefano Panella <Stefano.Panella@csr.com> Cc: Tony Lindgren <tony@atomide.com>
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由 Kalle Jokiniemi 提交于
There is a possible race condition in clockdomain code handling hw supported idle transitions. When multiple autodeps dependencies are being added or removed, a transition of still remaining dependent powerdomain can result in false readings of the state counter. This is especially fatal for off mode state counter, as it could result in a driver not noticing a context loss. Fixed by disabling hw supported state transitions when autodeps are being changed. Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Roland McGrath 提交于
The linker scripts grew some use of weirdly wrong linker script syntax. It happens to work, but it's not what the syntax is documented to be. Clean it up to use the official syntax. Signed-off-by: NRoland McGrath <roland@redhat.com> CC: Ian Lance Taylor <iant@google.com>
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由 Jarkko Nikula 提交于
This small typo written by author causes that McBSP receiver is disabled on OMAP2430 and OMAP3430 even if only transmitter is stopped. This was noted with ALSA SoC where simultaneous recording halted if playback was stopped first. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Teerth Reddy 提交于
This patch initializes the correct SDRC settings required for DVFS on Zoom2. Signed-off-by: NTeerth Reddy <teerth@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Aaro Koskinen 提交于
The I2C-1 bus frequency on RX-51 should be 2.2 MHz. The speed is limited by TWL5030/GAIA; a higher speed could lead to errors on the interface. The maximum speed depends on the system clock for GAIA: 2.2 MHz (if 19.2 MHz), 2.4 MHz (26 MHz) or 2.9 MHz (38.4 MHz). Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Anuj Aggarwal 提交于
Argument tparams was not being used to program global register GCR.HI_THREAD_RESERVED. This patch fixes the same. Signed-off-by: NAnuj Aggarwal <anuj.aggarwal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sanjeev Premi 提交于
The symbol CONFIG_ISP1301_OMAP was defined twice in the defconfig. This was causing the warning: arch/arm/configs/omap3_beagle_defconfig:972:warning: override: reassigning to symbol ISP1301_OMAP Signed-off-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 10月, 2009 18 次提交
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由 Li Hong 提交于
In 'cdd6c482', we renamed Performance Counters -> Performance Events. The name showed up in /proc/interrupts also needs a change. I use PMI (Performance monitoring interrupt) here, since it is the official name used in Intel's documents. Signed-off-by: NLi Hong <lihong.hi@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <20091014105039.GA22670@uhli> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Andreas Krebbel 提交于
This patch makes the hwcap bit for the high gprs feature to be visible in /proc/cpuinfo. Signed-off-by: NAndreas Krebbel <Andreas.Krebbel@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Michael Holzheu 提交于
Hypfs never worked on systems that only provide D204 subcode 6. In these cases we nevertheless used subcode 7. With this fix, we use subcode 6, if it is available and the system does not provide subcode 7. Signed-off-by: NMichael Holzheu <holzheu@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Paul Mundt 提交于
The resume_userspace path had TRACE_IRQS_OFF written incorrectly and so never handled the transition properly. This was fixed once before but seems to have made it back in the tree. Fix it for good. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This only needs to flush the return code via the legacy path, and just invalidates uselessly otherwise. This makes the behaviour consistent for all of the trampoline setup paths. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
The secondary CPU info was seeing corrupted results due to not entering all of the setup paths taken by the boot CPU. So we just memcpy() the boot cpu data over directly, and then fix up the per-CPU bits. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Trivial change for cleaning up the cpuinfo pretty printing on SMP, adds a newline between CPUs. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
We do not want to use smp_processor_id() from these paths, as they trip preempt BUGs. Switch the test over to the boot cpu directly. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Heiko Schocher 提交于
making a powerpc target with PCI support, shows the following warning: MODPOST vmlinux.o WARNING: vmlinux.o(.text+0x10430): Section mismatch in reference from the function pcibios_allocate_bus_resources() to the function .init.text:reparent_resources() The function pcibios_allocate_bus_resources() references the function __init reparent_resources(). This is often because pcibios_allocate_bus_resources lacks a __init annotation or the annotation of reparent_resources is wrong. This patch fix this warning by removing the __init annotation before reparent_resources. Signed-off-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Dragos Tatulea 提交于
Here's a patch that adds the ppc750 CL cpu as supported by oprofile. Signed-off-by: NDragos Tatulea <dtatulea@ixiacom.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Sean MacLennan 提交于
We need to align before the output section. Having the align inside the output section causes the linker to put some filler in there, which makes it a non-empty section, but this section isn't assigned to a segment so you get a warning from the linker. Signed-off-by: NSean MacLennan <smaclennan@pikatech.com> Acked-by: NSegher Boessenkool <segher@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Vorontsov 提交于
'acc' isn't used anywhere and thus triggers gcc warning, which causes build error with CONFIG_PPC_DISABLE_WERROR=n (default): cc1: warnings being treated as errors arch/powerpc/kernel/kgdb.c: In function 'gdb_regs_to_pt_regs': arch/powerpc/kernel/kgdb.c:289: warning: unused variable 'acc' make[1]: *** [arch/powerpc/kernel/kgdb.o] Error 1 Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Profiling of a page fault scalability microbenchmark shows flush_hash_range is not calling the batch hpte invalidate hcall (H_BULK_REMOVE). It turns out we have a duplicate firmware feature for hcall-bulk and the current setup code stops after finding the first match. This meant we never batch and always do individual invalidates. The patch below removes the duplicate and shifts FW_FEATURE_CMO to close the gap. With the patch applied the single threaded page fault rate improves from 217169 to 238755 per second on a POWER5 test box, a 10% improvement. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
On pSeries, we always force the IO space to be mapped using 4K pages even with a 64K base page size to cope with some limitations in the HV interface to some devices. However, the SLB miss handler code to discriminate between vmalloc and ioremap space uses a CPU feature section such that the code is nop'ed out when the processor support large pages non-cachable mappings. Thus, we end up always using the ioremap page size for vmalloc segments on such processors, causing a discrepency between the segment and the hash table, and thus a hang continously hashing the page. It works for the first segment of the vmalloc space since that segment is "bolted" in by C code correctly, and thankfully we almost never use the vmalloc space beyond the first segment, but the new percpu code made the bug happen. This fixes it by removing the feature section from the assembly, we now always do the comparison between vmalloc and ioremap. Signed-off-by; Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Ellerman 提交于
cppcheck found a memory leak in axon_msi, if dcr_base or dcr_len are zero, we have already allocated msic, so we should free it in the error path. Signed-off-by: NEric Sesterhenn <eric.sesterhenn@lsexperts.de> Acked-by: NMichael Ellerman <michael@ellerman.id.au> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Since the change of how interrupts are disabled during suspend, certain PowerBook models started exhibiting various issues during suspend or resume from sleep. I finally tracked it down to the code that runs various "platform" functions (kind of little scripts extracted from the device-tree), which uses our i2c and PMU drivers expecting interrutps to work, and at a time where with the new scheme, they have been disabled. This causes timeouts internally which for some reason results in the PMU being unable to see the trackpad, among other issues, really it depends on the machine. Most of the time, we fail to properly adjust some clocks for suspend/resume so the results are not always predictable. This patch fixes it by using IRQF_TIMER for both the PMU and the I2C interrupts. I prefer doing it this way than moving the call sites since I really want those platform functions to still be called after all drivers (and before sysdevs). We also do a slight cleanup to via-pmu.c driver to make sure the ADB autopoll mask is handled correctly when doing bus resets Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Steven Rostedt 提交于
The mod_return_to_handler needs to switch to the kernel TOC before jumping to a the kernel code. It currently does this by looking at the kernel function data and retrieves the TOC that way. Not only is this inefficient, it also breaks with a relocatable kernel. The PACA contains the kernel TOC and we can easily retrieve it that way. Reported-by: NSachin Sant <sachinp@in.ibm.com> Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
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由 Steven Rostedt 提交于
When the function graph tracer is enabled, it replaces the return address with a hook back to the tracer. This makes back traces see the hook instead of the actual return address. The current code also shows the real address by checking if the return address jumps to the return_to_handler. If it is, is also prints out the saved real return address. On powerpc64, some modules may return to mod_return_to_handler, which is not checked. This patch will also show the real address if a return is to mod_return_to_handler as well. Signed-off-by: NSteven Rostedt <rostedt@goodmis.org>
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- 13 10月, 2009 4 次提交
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由 David S. Miller 提交于
With lots of virtual devices it's easy to generate a lot of events and chew up the kernel IRQ stack. Reported-by: Nhyl <heyongli@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Hidetoshi Seto 提交于
This approach is the first baby step towards solving many of the structural problems the x86 MCE logging code is having today: - It has a private ring-buffer implementation that has a number of limitations and has been historically fragile and buggy. - It is using a quirky /dev/mcelog ioctl driven ABI that is MCE specific. /dev/mcelog is not part of any larger logging framework and hence has remained on the fringes for many years. - The MCE logging code is still very unclean partly due to its ABI limitations. Fields are being reused for multiple purposes, and the whole message structure is limited and x86 specific to begin with. All in one, the x86 tree would like to move away from this private implementation of an event logging facility to a broader framework. By using perf events we gain the following advantages: - Multiple user-space agents can access MCE events. We can have an mcelog daemon running but also a system-wide tracer capturing important events in flight-recorder mode. - Sampling support: the kernel and the user-space call-chain of MCE events can be stored and analyzed as well. This way actual patterns of bad behavior can be matched to precisely what kind of activity happened in the kernel (and/or in the app) around that moment in time. - Coupling with other hardware and software events: the PMU can track a number of other anomalies - monitoring software might chose to monitor those plus the MCE events as well - in one coherent stream of events. - Discovery of MCE sources - tracepoints are enumerated and tools can act upon the existence (or non-existence) of various channels of MCE information. - Filtering support: we just subscribe to and act upon the events we are interested in. Then even on a per event source basis there's in-kernel filter expressions available that can restrict the amount of data that hits the event channel. - Arbitrary deep per cpu buffering of events - we can buffer 32 entries or we can buffer as much as we want, as long as we have the RAM. - An NMI-safe ring-buffer implementation - mappable to user-space. - Built-in support for timestamping of events, PID markers, CPU markers, etc. - A rich ABI accessible over system call interface. Per cpu, per task and per workload monitoring of MCE events can be done this way. The ABI itself has a nice, meaningful structure. - Extensible ABI: new fields can be added without breaking tooling. New tracepoints can be added as the hardware side evolves. There's various parsers that can be used. - Lots of scheduling/buffering/batching modes of operandi for MCE events. poll() support. mmap() support. read() support. You name it. - Rich tooling support: even without any MCE specific extensions added the 'perf' tool today offers various views of MCE data: perf report, perf stat, perf trace can all be used to view logged MCE events and perhaps correlate them to certain user-space usage patterns. But it can be used directly as well, for user-space agents and policy action in mcelog, etc. With this we hope to achieve significant code cleanup and feature improvements in the MCE code, and we hope to be able to drop the /dev/mcelog facility in the end. This patch is just a plain dumb dump of mce_log() records to the tracepoints / perf events framework - a first proof of concept step. Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Huang Ying <ying.huang@intel.com> Cc: Andi Kleen <ak@linux.intel.com> LKML-Reference: <4AD42A0D.7050104@jp.fujitsu.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Jeremy Fitzhardinge 提交于
Bastian Blank reported a boot crash with stackprotector enabled, and debugged it back to edx register corruption. For historical reasons irq enable/disable/save/restore had special calling sequences to make them more efficient. With the more recent introduction of higher-level and more general optimisations this is no longer necessary so we can just use the normal PVOP_ macros. This fixes some residual bugs in the old implementations which left edx liable to inadvertent clobbering. Also, fix some bugs in __PVOP_VCALLEESAVE which were revealed by actual use. Reported-by: NBastian Blank <bastian@waldi.eu.org> Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Stable Kernel <stable@kernel.org> Cc: Xen-devel <xen-devel@lists.xensource.com> LKML-Reference: <4AD3BC9B.7040501@goop.org> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Ingo Molnar 提交于
There was namespace overlap due to a rename i did - this caused the following build warning, reported by Stephen Rothwell against linux-next x86_64 allmodconfig: arch/x86/kernel/cpu/perf_event.c: In function 'intel_get_event_idx': arch/x86/kernel/cpu/perf_event.c:1445: warning: 'event_constraint' is used uninitialized in this function This is a real bug not just a warning: fix it by renaming the global event-constraints table pointer to 'event_constraints'. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Cc: Stephane Eranian <eranian@gmail.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20091013144223.369d616d.sfr@canb.auug.org.au> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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