1. 19 1月, 2018 2 次提交
    • M
      powerpc/64: Change soft_enabled from flag to bitmask · 01417c6c
      Madhavan Srinivasan 提交于
      "paca->soft_enabled" is used as a flag to mask some of interrupts.
      Currently supported flags values and their details:
      
      soft_enabled    MSR[EE]
      
      0               0       Disabled (PMI and HMI not masked)
      1               1       Enabled
      
      "paca->soft_enabled" is initialized to 1 to make the interripts as
      enabled. arch_local_irq_disable() will toggle the value when
      interrupts needs to disbled. At this point, the interrupts are not
      actually disabled, instead, interrupt vector has code to check for the
      flag and mask it when it occurs. By "mask it", it update interrupt
      paca->irq_happened and return. arch_local_irq_restore() is called to
      re-enable interrupts, which checks and replays interrupts if any
      occured.
      
      Now, as mentioned, current logic doesnot mask "performance monitoring
      interrupts" and PMIs are implemented as NMI. But this patchset depends
      on local_irq_* for a successful local_* update. Meaning, mask all
      possible interrupts during local_* update and replay them after the
      update.
      
      So the idea here is to reserve the "paca->soft_enabled" logic. New
      values and details:
      
      soft_enabled    MSR[EE]
      
      1               0       Disabled  (PMI and HMI not masked)
      0               1       Enabled
      
      Reason for the this change is to create foundation for a third mask
      value "0x2" for "soft_enabled" to add support to mask PMIs. When
      ->soft_enabled is set to a value "3", PMI interrupts are mask and when
      set to a value of "1", PMI are not mask. With this patch also extends
      soft_enabled as interrupt disable mask.
      
      Current flags are renamed from IRQ_[EN?DIS}ABLED to
      IRQS_ENABLED and IRQS_DISABLED.
      
      Patch also fixes the ptrace call to force the user to see the softe
      value to be alway 1. Reason being, even though userspace has no
      business knowing about softe, it is part of pt_regs. Like-wise in
      signal context.
      Signed-off-by: NMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      01417c6c
    • M
      powerpc/64: Add #defines for paca->soft_enabled flags · c2e480ba
      Madhavan Srinivasan 提交于
      Two #defines IRQS_ENABLED and IRQS_DISABLED are added to be used when
      updating paca->soft_enabled. Replace the hardcoded values used when
      updating paca->soft_enabled with IRQ_(EN|DIS)ABLED #define. No logic
      change.
      Reviewed-by: NNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: NMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      c2e480ba
  2. 16 10月, 2017 1 次提交
  3. 20 6月, 2017 5 次提交
  4. 19 6月, 2017 1 次提交
  5. 28 4月, 2017 5 次提交
  6. 23 4月, 2017 2 次提交
  7. 20 4月, 2017 1 次提交
    • N
      powerpc/64s: Use relon prolog for EXC_VIRT_OOL_MASKABLE_HV handlers · a050d20d
      Nicholas Piggin 提交于
      Hypervisor Virtualization and Directed Hypervisor Doorbell interrupt handlers
      use the macro EXC_VIRT_OOL_MASKABLE_HV for their relocation-on handlers, which
      calls MASKABLE_RELON_EXCEPTION_HV_OOL, which uses the *real mode* interrupt
      prolog. This means we needlessly rfid from virtual mode to virtual mode.
      
      For POWER8 it only affects doorbell IPIs. Context switch microbenchmark between
      threads with snooze disabled (which causes IPI) gets about 3% faster, about 370
      cycles. Should be more important on POWER9 with global doorbells and HVI for
      host interrupts.
      
      Use the RELON variant instead to reduce overhead.
      
      Fixes: 1707dd16 ("powerpc: Save CFAR before branching in interrupt entry paths")
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      [mpe: Fold some more detail into the change log]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      a050d20d
  8. 18 4月, 2017 1 次提交
    • M
      powerpc/64: Fix HMI exception on LE with CONFIG_RELOCATABLE=y · be5c5e84
      Michael Ellerman 提交于
      Prior to commit 2337d207 ("powerpc/64: CONFIG_RELOCATABLE support for hmi
      interrupts"), the branch from hmi_exception_early() to hmi_exception_realmode()
      was just a bl hmi_exception_realmode, which the linker would turn into a bl to
      the local entry point of hmi_exception_realmode. This was broken when
      CONFIG_RELOCATABLE=y because hmi_exception_realmode() is not in the low part of
      the kernel text that is copied down to 0x0.
      
      But in fixing that, we added a new bug on little endian kernels. Because the
      branch is now a bctrl when CONFIG_RELOCATABLE=y, we branch to the global entry
      point of hmi_exception_realmode(). The global entry point must be called with
      r12 containing the address of hmi_exception_realmode(), because it uses that
      value to calculate the TOC value (r2).
      
      This may manifest as a checkstop, because we take a junk value from r12 which
      came from HSRR1, add a small constant to it and then use that as the TOC
      pointer. The HSRR1 value will have 0x9 as the top nibble, which puts it above
      RAM and somewhere in MMIO space.
      
      Fix it by changing the BRANCH_LINK_TO_FAR() macro to always use r12 to load the
      label we're branching to. This means r12 will be setup correctly on LE, fixing
      this bug, and r12 is also volatile across function calls on BE so it's a good
      choice anyway.
      
      Fixes: 2337d207 ("powerpc/64: CONFIG_RELOCATABLE support for hmi interrupts")
      Reported-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: NNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      be5c5e84
  9. 07 2月, 2017 1 次提交
  10. 31 1月, 2017 2 次提交
  11. 27 1月, 2017 1 次提交
  12. 12 11月, 2016 2 次提交
    • H
      powerpc: Fix exception vector build with 2.23 era binutils · e6740ae6
      Hugh Dickins 提交于
      The changes to use gas sections for constructing the exception vectors
      causes a build break when using binutils 2.23:
      
        arch/powerpc/kernel/exceptions-64s.S:770: Error: operand out of range
        (0xffffffffffff8100 is not between 0x0000000000000000 and 0x000000000000ffff)
      
      And so on.
      
      Reported by Hugh with binutils-2.23.2-8.1.4.ppc64 from openSUSE 13.1 and
      also Naveen & Denis using 2.23.52.0.1-26.el7 from RHEL 7. Strangely
      binutils 2.22 (what I test with) is not affected.
      
      This is caused by the use of @l in LOAD_HANDLER(). The @l was only
      recently added in commit a24553dd ("powerpc/pseries: Remove
      unnecessary syscall trampoline").
      
      Luckily the gas section changes split out the LOAD_SYSCALL_HANDLER()
      macro, which means we actually *don't* need to use @l in LOAD_HANDLER()
      any more, only in LOAD_SYSCALL_HANDLER().
      
      So drop the @l from LOAD_HANDLER().
      
      Fixes: 57f26649 ("powerpc: Use gas sections for arranging exception vectors")
      Signed-off-by: NHugh Dickins <hughd@google.com>
      [mpe: Add gory details to change log]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      e6740ae6
    • N
      powerpc/64s: Fix system reset interrupt winkle wakeups · f23ed166
      Nicholas Piggin 提交于
      Wakeups from winkle set the low bit of the HSPRG0 register, to
      distinguish it from other sleep states. This is also the PACA pointer.
      The system reset exception handler fails to mask this bit away before
      using this value before using it as the PACA pointer.
      
      Fix this by adding a new type of exception prolog macro where we already
      have the PACA set in r13, and have the system reset vector mask it out.
      The winkle wakeup handler will store the masked value back into HSPRG0.
      
      Fixes: fb479e44 ("powerpc/64s: relocation, register save fixes for system reset interrupt")
      Cc: stable@vger.kernel.org # v3.0+
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Reviewed-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      f23ed166
  13. 27 10月, 2016 1 次提交
    • N
      powerpc/64s: relocation, register save fixes for system reset interrupt · fb479e44
      Nicholas Piggin 提交于
      This patch does a couple of things. First of all, powernv immediately
      explodes when running a relocated kernel, because the system reset
      exception for handling sleeps does not do correct relocated branches.
      
      Secondly, the sleep handling code trashes the condition and cfar
      registers, which we would like to preserve for debugging purposes (for
      non-sleep case exception).
      
      This patch changes the exception to use the standard format that saves
      registers before any tests or branches are made. It adds the test for
      idle-wakeup as an "extra" to break out of the normal exception path.
      Then it branches to a relocated idle handler that calls the various
      idle handling functions.
      
      After this patch, POWER8 CPU simulator now boots powernv kernel that is
      running at non-zero.
      
      Fixes: 948cf67c ("powerpc: Add NAP mode support on Power7 in HV mode")
      Cc: stable@vger.kernel.org # v3.0+
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Acked-by: NGautham R. Shenoy <ego@linux.vnet.ibm.com>
      Acked-by: NBalbir Singh <bsingharora@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      fb479e44
  14. 04 10月, 2016 2 次提交
    • N
      powerpc: Use gas sections for arranging exception vectors · 57f26649
      Nicholas Piggin 提交于
      Use assembler sections of fixed size and location to arrange the 64-bit
      Book3S exception vector code (64-bit Book3E also uses it in head_64.S
      for 0x0..0x100).
      
      This allows better flexibility in arranging exception code and hiding
      unimportant details behind macros.
      
      Gas sections can be a bit painful to use this way, mainly because the
      assembler does not know where they will be finally linked. Taking
      absolute addresses requires a bit of trickery for example, but it can
      be hidden behind macros for the most part.
      
      Generated code is mostly the same except locations, offsets, alignments.
      
      The "+ 0x2" is only required for the trap number / kvm exit number,
      which gets loaded as a constant into a register.
      
      Previously, code also used + 0x2 for label names, but we changed to
      using "H" to distinguish HV case for that. Remove the last vestiges
      of that.
      
      __after_prom_start is taking absolute address of a label in another
      fixed section. Newer toolchains seemed to compile this okay, but older
      ones do not. FIXED_SYMBOL_ABS_ADDR is more foolproof, it just takes an
      additional line to define.
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      57f26649
    • M
      powerpc/64s: Add new exception vector macros · da2bc464
      Michael Ellerman 提交于
      Create arch/powerpc/include/asm/head-64.h with macros that specify
      an exception vector (name, type, location), which will be used to
      label and lay out exceptions into the object file.
      
      Naming is moved out of exception-64s.h, which is used to specify the
      implementation of exception handlers.
      
      objdump of generated code in exception vectors is unchanged except for
      names. Alignment directives scattered around are annoying, but done
      this way so that disassembly can verify identical instruction
      generation before and after patch. These get cleaned up in future
      patch.
      
      We change the way KVMTEST works, explicitly passing EXC_HV or EXC_STD
      rather than overloading the trap number. This removes the need to have
      SOFTEN values for the overloaded trap numbers, eg. 0x502.
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      da2bc464
  15. 23 9月, 2016 1 次提交
    • N
      powerpc/pseries: Remove unnecessary syscall trampoline · a24553dd
      Nicholas Piggin 提交于
      When we originally added the ability to split the exception vectors from
      the kernel (commit 1f6a93e4 ("powerpc: Make it possible to move the
      interrupt handlers away from the kernel" 2008-09-15)), the LOAD_HANDLER() macro
      used an addi instruction to compute the offset of the common handler
      from the kernel base address.
      
      Using addi meant the handler had to be within 32K of the kernel base
      address, due to the addi instruction taking a signed immediate value.
      That necessitated creating a trampoline for the system call handler,
      because system_call_common (in entry64.S) is not linked within 32K of
      the kernel base address.
      
      Later in commit 61e2390e ("powerpc: Make load_hander handle upto 64k
      offset" 2012-11-15) we changed LOAD_HANDLER to take a 64K offset, by
      changing it to use ori.
      
      Although system_call_common is not in head_64.S or exceptions-64s.S, it
      is included in head-y, which causes it to be linked early in the kernel
      text, so in practice it ends up below 64K. Additionally if it can't be
      placed below 64K the linker will fail to build with a "relocation
      truncated to fit" error.
      
      So remove the trampoline.
      
      Newer toolchains are able to work out that the ori in LOAD_HANDLER only
      takes a 16 bit offset, and so they generate a 16 bit relocation. Older
      toolchains (binutils 2.22 at least) are not so smart, so we have to add
      the @l annotation to tell the assembler to generate a 16 bit relocation.
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      a24553dd
  16. 13 9月, 2016 2 次提交
  17. 17 7月, 2016 1 次提交
  18. 09 7月, 2016 1 次提交
  19. 17 12月, 2015 2 次提交
    • M
      powerpc/kernel: Combine vec/loc for STD_EXCEPTION_PSERIES · 2613265c
      Michael Ellerman 提交于
      The STD_EXCEPTION_PSERIES macro takes both a vector number, and a
      location (memory address). However both are always identical, so combine
      them to save repeating ourselves.
      
      This does mean an exception handler must always exist at the location in
      memory that matches its vector number. But that's OK because this is the
      "STD" macro (standard), which does exactly that. We have other macros
      for the other cases, eg. STD_EXCEPTION_PSERIES_OOL (out of line).
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2613265c
    • M
      powerpc/kernel: Drop HMT_MEDIUM_PPR_DISCARD · d6265aea
      Michael Ellerman 提交于
      HMT_MEDIUM_PPR_DISCARD is a macro which is present at the start of most
      of our first level exception handlers. It conditionally executes a
      HMT_MEDIUM instruction, which sets the processor priority to medium.
      
      On on modern systems, ie. Power7 and later, it is nop'ed out at boot.
      All it does is make the exception vectors more cramped, and consume 4
      bytes of icache.
      
      On old systems it has the effect of boosting the processor priority at
      the start of exception processing. If we were previously in the idle
      loop for example, we may be at low or very low priority. This is
      desirable as we want to process the exception as fast as possible.
      
      However looking closely at the generated code, we see that in all cases
      we execute another HMT_MEDIUM just four instructions later. With code
      patching applied, the final code on an old (Power6) system will look
      like, eg:
      
        c000000000000300 <data_access_pSeries>:
        c000000000000300:	7c 42 13 78	mr	r2,r2		<-
        c000000000000304:	7d b2 43 a6	mtsprg	2,r13
        c000000000000308:	7d b1 42 a6	mfsprg	r13,1
        c00000000000030c:	f9 2d 00 80	std	r9,128(r13)
        c000000000000310:	60 00 00 00	nop
        c000000000000314:	7c 42 13 78	mr	r2,r2		<-
      
      So I suggest that the added code complexity of HMT_MEDIUM_PPR_DISCARD is
      not justified by the benefit of boosting the processor priority for the
      duration of four instructions, and therefore we drop it.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      d6265aea
  20. 01 12月, 2015 1 次提交
    • P
      powerpc/64: Include KVM guest test in all interrupt vectors · 31a40e2b
      Paul Mackerras 提交于
      Currently, if HV KVM is configured but PR KVM isn't, we don't include
      a test to see whether we were interrupted in KVM guest context for the
      set of interrupts which get delivered directly to the guest by hardware
      if they occur in the guest.  This includes things like program
      interrupts.
      
      However, the recent bug where userspace could set the MSR for a VCPU
      to have an illegal value in the TS field, and thus cause a TM Bad Thing
      type of program interrupt on the hrfid that enters the guest, showed that
      we can never be completely sure that these interrupts can never occur
      in the guest entry/exit code.  If one of these interrupts does happen
      and we have HV KVM configured but not PR KVM, then we end up trying to
      run the handler in the host with the MMU set to the guest MMU context,
      which generally ends badly.
      
      Thus, for robustness it is better to have the test in every interrupt
      vector, so that if some way is found to trigger some interrupt in the
      guest entry/exit path, we can handle it without immediately crashing
      the host.
      
      This means that the distinction between KVMTEST and KVMTEST_PR goes
      away.  Thus we delete KVMTEST_PR and associated macros and use KVMTEST
      everywhere that we previously used either KVMTEST_PR or KVMTEST.  It
      also means that SOFTEN_TEST_HV_201 becomes the same as SOFTEN_TEST_PR,
      so we deleted SOFTEN_TEST_HV_201 and use SOFTEN_TEST_PR instead.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      31a40e2b
  21. 05 8月, 2014 1 次提交
  22. 28 7月, 2014 2 次提交
  23. 23 4月, 2014 1 次提交
  24. 24 3月, 2014 1 次提交