提交 ff18e1ef 编写于 作者: J Jonas Gorski 提交者: Mark Brown

spi/bcm63xx-hsspi: allow providing clock rate through a second clock

The HSSPI block actually has two clock inputs, one for gating the block,
and one for the PLL rate. To allow these to be represented as two clocks,
add support for retrieving the rate from a separate "pll" clock, if the
"hsspi" clock does not provide one.
Signed-off-by: NJonas Gorski <jonas.gorski@gmail.com>
Acked-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
上级 ccd0657c
...@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev) ...@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
return PTR_ERR(clk); return PTR_ERR(clk);
rate = clk_get_rate(clk); rate = clk_get_rate(clk);
if (!rate) if (!rate) {
return -EINVAL; struct clk *pll_clk = devm_clk_get(dev, "pll");
if (IS_ERR(pll_clk))
return PTR_ERR(pll_clk);
rate = clk_get_rate(pll_clk);
if (!rate)
return -EINVAL;
}
ret = clk_prepare_enable(clk); ret = clk_prepare_enable(clk);
if (ret) if (ret)
......
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