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edbe805b
编写于
8月 30, 2008
作者:
D
David S. Miller
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
sparc64: Convert SABRE PCI controller driver into a real driver.
Signed-off-by:
N
David S. Miller
<
davem@davemloft.net
>
上级
b20bfe41
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
85 addition
and
45 deletion
+85
-45
arch/sparc64/kernel/pci.c
arch/sparc64/kernel/pci.c
+0
-4
arch/sparc64/kernel/pci_sabre.c
arch/sparc64/kernel/pci_sabre.c
+85
-41
未找到文件。
arch/sparc64/kernel/pci.c
浏览文件 @
edbe805b
...
@@ -165,16 +165,12 @@ void pci_config_write32(u32 *addr, u32 val)
...
@@ -165,16 +165,12 @@ void pci_config_write32(u32 *addr, u32 val)
}
}
/* Probe for all PCI controllers in the system. */
/* Probe for all PCI controllers in the system. */
extern
void
sabre_init
(
struct
device_node
*
,
const
char
*
);
extern
void
fire_pci_init
(
struct
device_node
*
,
const
char
*
);
extern
void
fire_pci_init
(
struct
device_node
*
,
const
char
*
);
static
struct
{
static
struct
{
char
*
model_name
;
char
*
model_name
;
void
(
*
init
)(
struct
device_node
*
,
const
char
*
);
void
(
*
init
)(
struct
device_node
*
,
const
char
*
);
}
pci_controller_table
[]
__initdata
=
{
}
pci_controller_table
[]
__initdata
=
{
{
"SUNW,sabre"
,
sabre_init
},
{
"pci108e,a000"
,
sabre_init
},
{
"pci108e,a001"
,
sabre_init
},
{
"pciex108e,80f0"
,
fire_pci_init
},
{
"pciex108e,80f0"
,
fire_pci_init
},
};
};
#define PCI_NUM_CONTROLLER_TYPES ARRAY_SIZE(pci_controller_table)
#define PCI_NUM_CONTROLLER_TYPES ARRAY_SIZE(pci_controller_table)
...
...
arch/sparc64/kernel/pci_sabre.c
浏览文件 @
edbe805b
...
@@ -16,13 +16,14 @@
...
@@ -16,13 +16,14 @@
#include <asm/apb.h>
#include <asm/apb.h>
#include <asm/iommu.h>
#include <asm/iommu.h>
#include <asm/irq.h>
#include <asm/irq.h>
#include <asm/smp.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/prom.h>
#include "pci_impl.h"
#include "pci_impl.h"
#include "iommu_common.h"
#include "iommu_common.h"
#define DRIVER_NAME "sabre"
#define PFX DRIVER_NAME ": "
/* All SABRE registers are 64-bits. The following accessor
/* All SABRE registers are 64-bits. The following accessor
* routines are how they are accessed. The REG parameter
* routines are how they are accessed. The REG parameter
* is a physical address.
* is a physical address.
...
@@ -656,8 +657,8 @@ static void __init sabre_scan_bus(struct pci_pbm_info *pbm)
...
@@ -656,8 +657,8 @@ static void __init sabre_scan_bus(struct pci_pbm_info *pbm)
* to live at bus 0.
* to live at bus 0.
*/
*/
if
(
once
!=
0
)
{
if
(
once
!=
0
)
{
pr
om_printf
(
"SABRE:
Multiple controllers unsupported.
\n
"
);
pr
intk
(
KERN_ERR
PFX
"
Multiple controllers unsupported.
\n
"
);
prom_halt
()
;
return
;
}
}
once
++
;
once
++
;
...
@@ -705,8 +706,10 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
...
@@ -705,8 +706,10 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
*/
*/
err
=
iommu_table_init
(
iommu
,
tsbsize
*
1024
*
8
,
err
=
iommu_table_init
(
iommu
,
tsbsize
*
1024
*
8
,
dvma_offset
,
dma_mask
,
pbm
->
numa_node
);
dvma_offset
,
dma_mask
,
pbm
->
numa_node
);
if
(
err
)
if
(
err
)
{
printk
(
KERN_ERR
PFX
"iommu_table_init() failed
\n
"
);
return
err
;
return
err
;
}
sabre_write
(
pbm
->
controller_regs
+
SABRE_IOMMU_TSBBASE
,
sabre_write
(
pbm
->
controller_regs
+
SABRE_IOMMU_TSBBASE
,
__pa
(
iommu
->
page_table
));
__pa
(
iommu
->
page_table
));
...
@@ -722,9 +725,8 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
...
@@ -722,9 +725,8 @@ static int sabre_iommu_init(struct pci_pbm_info *pbm,
control
|=
SABRE_IOMMU_TSBSZ_128K
;
control
|=
SABRE_IOMMU_TSBSZ_128K
;
break
;
break
;
default:
default:
prom_printf
(
"iommu_init: Illegal TSB size %d
\n
"
,
tsbsize
);
printk
(
KERN_ERR
PFX
"Illegal TSB size %d
\n
"
,
tsbsize
);
prom_halt
();
return
-
EINVAL
;
break
;
}
}
sabre_write
(
pbm
->
controller_regs
+
SABRE_IOMMU_CONTROL
,
control
);
sabre_write
(
pbm
->
controller_regs
+
SABRE_IOMMU_CONTROL
,
control
);
...
@@ -739,7 +741,6 @@ static void __init sabre_pbm_init(struct pci_controller_info *p,
...
@@ -739,7 +741,6 @@ static void __init sabre_pbm_init(struct pci_controller_info *p,
pbm
->
numa_node
=
-
1
;
pbm
->
numa_node
=
-
1
;
pbm
->
scan_bus
=
sabre_scan_bus
;
pbm
->
pci_ops
=
&
sun4u_pci_ops
;
pbm
->
pci_ops
=
&
sun4u_pci_ops
;
pbm
->
config_space_reg_bits
=
8
;
pbm
->
config_space_reg_bits
=
8
;
...
@@ -751,46 +752,49 @@ static void __init sabre_pbm_init(struct pci_controller_info *p,
...
@@ -751,46 +752,49 @@ static void __init sabre_pbm_init(struct pci_controller_info *p,
pci_get_pbm_props
(
pbm
);
pci_get_pbm_props
(
pbm
);
pci_determine_mem_io_space
(
pbm
);
pci_determine_mem_io_space
(
pbm
);
sabre_scan_bus
(
pbm
);
}
}
void
__init
sabre_init
(
struct
device_node
*
dp
,
char
*
model_name
)
static
int
__devinit
sabre_probe
(
struct
of_device
*
op
,
const
struct
of_device_id
*
match
)
{
{
const
struct
linux_prom64_registers
*
pr_regs
;
const
struct
linux_prom64_registers
*
pr_regs
;
struct
device_node
*
dp
=
op
->
node
;
struct
pci_controller_info
*
p
;
struct
pci_controller_info
*
p
;
struct
pci_pbm_info
*
pbm
;
struct
pci_pbm_info
*
pbm
;
u32
upa_portid
,
dma_mask
;
struct
iommu
*
iommu
;
struct
iommu
*
iommu
;
int
tsbsize
;
int
tsbsize
,
err
;
const
u32
*
vdma
;
const
u32
*
vdma
;
u32
upa_portid
,
dma_mask
;
u64
clear_irq
;
u64
clear_irq
;
hummingbird_p
=
0
;
hummingbird_p
=
(
match
->
data
!=
NULL
);
if
(
!
strcmp
(
model_name
,
"pci108e,a001"
))
if
(
!
hummingbird_p
)
{
hummingbird_p
=
1
;
struct
device_node
*
cpu_dp
;
else
if
(
!
strcmp
(
model_name
,
"SUNW,sabre"
))
{
const
char
*
compat
=
of_get_property
(
dp
,
"compatible"
,
NULL
);
/* Of course, Sun has to encode things a thousand
if
(
compat
&&
!
strcmp
(
compat
,
"pci108e,a001"
))
* different ways, inconsistently.
hummingbird_p
=
1
;
*/
if
(
!
hummingbird_p
)
{
for_each_node_by_type
(
cpu_dp
,
"cpu"
)
{
struct
device_node
*
dp
;
if
(
!
strcmp
(
cpu_dp
->
name
,
"SUNW,UltraSPARC-IIe"
))
hummingbird_p
=
1
;
/* Of course, Sun has to encode things a thousand
* different ways, inconsistently.
*/
for_each_node_by_type
(
dp
,
"cpu"
)
{
if
(
!
strcmp
(
dp
->
name
,
"SUNW,UltraSPARC-IIe"
))
hummingbird_p
=
1
;
}
}
}
}
}
err
=
-
ENOMEM
;
p
=
kzalloc
(
sizeof
(
*
p
),
GFP_ATOMIC
);
p
=
kzalloc
(
sizeof
(
*
p
),
GFP_ATOMIC
);
if
(
!
p
)
if
(
!
p
)
{
goto
fatal_memory_error
;
printk
(
KERN_ERR
PFX
"Cannot allocate controller info.
\n
"
);
goto
out_free
;
}
iommu
=
kzalloc
(
sizeof
(
*
iommu
),
GFP_ATOMIC
);
iommu
=
kzalloc
(
sizeof
(
*
iommu
),
GFP_ATOMIC
);
if
(
!
iommu
)
if
(
!
iommu
)
{
goto
fatal_memory_error
;
printk
(
KERN_ERR
PFX
"Cannot allocate PBM iommu.
\n
"
);
goto
out_free
;
}
pbm
=
&
p
->
pbm_A
;
pbm
=
&
p
->
pbm_A
;
pbm
->
iommu
=
iommu
;
pbm
->
iommu
=
iommu
;
...
@@ -806,6 +810,11 @@ void __init sabre_init(struct device_node *dp, char *model_name)
...
@@ -806,6 +810,11 @@ void __init sabre_init(struct device_node *dp, char *model_name)
*/
*/
pr_regs
=
of_get_property
(
dp
,
"reg"
,
NULL
);
pr_regs
=
of_get_property
(
dp
,
"reg"
,
NULL
);
err
=
-
ENODEV
;
if
(
!
pr_regs
)
{
printk
(
KERN_ERR
PFX
"No reg property
\n
"
);
goto
out_free
;
}
/*
/*
* First REG in property is base of entire SABRE register space.
* First REG in property is base of entire SABRE register space.
...
@@ -832,6 +841,10 @@ void __init sabre_init(struct device_node *dp, char *model_name)
...
@@ -832,6 +841,10 @@ void __init sabre_init(struct device_node *dp, char *model_name)
(
pbm
->
controller_regs
+
SABRE_CONFIGSPACE
);
(
pbm
->
controller_regs
+
SABRE_CONFIGSPACE
);
vdma
=
of_get_property
(
dp
,
"virtual-dma"
,
NULL
);
vdma
=
of_get_property
(
dp
,
"virtual-dma"
,
NULL
);
if
(
!
vdma
)
{
printk
(
KERN_ERR
PFX
"No virtual-dma property
\n
"
);
goto
out_free
;
}
dma_mask
=
vdma
[
0
];
dma_mask
=
vdma
[
0
];
switch
(
vdma
[
1
])
{
switch
(
vdma
[
1
])
{
...
@@ -849,20 +862,51 @@ void __init sabre_init(struct device_node *dp, char *model_name)
...
@@ -849,20 +862,51 @@ void __init sabre_init(struct device_node *dp, char *model_name)
tsbsize
=
128
;
tsbsize
=
128
;
break
;
break
;
default:
default:
pr
om_printf
(
"SABRE: s
trange virtual-dma size.
\n
"
);
pr
intk
(
KERN_ERR
PFX
"S
trange virtual-dma size.
\n
"
);
prom_halt
()
;
goto
out_free
;
}
}
if
(
sabre_iommu_init
(
pbm
,
tsbsize
,
vdma
[
0
],
dma_mask
))
err
=
sabre_iommu_init
(
pbm
,
tsbsize
,
vdma
[
0
],
dma_mask
);
goto
fatal_memory_error
;
if
(
err
)
goto
out_free
;
/*
/*
* Look for APB underneath.
* Look for APB underneath.
*/
*/
sabre_pbm_init
(
p
,
pbm
,
dp
);
sabre_pbm_init
(
p
,
pbm
,
dp
);
return
;
return
0
;
fatal_memory_error:
out_free:
prom_printf
(
"SABRE: Fatal memory allocation error.
\n
"
);
if
(
p
)
{
prom_halt
();
if
(
p
->
pbm_A
.
iommu
)
kfree
(
p
->
pbm_A
.
iommu
);
kfree
(
p
);
}
return
err
;
}
}
static
struct
of_device_id
sabre_match
[]
=
{
{
.
name
=
"pci"
,
.
compatible
=
"pci108e,a001"
,
.
data
=
(
void
*
)
1
,
},
{
.
name
=
"pci"
,
.
compatible
=
"pci108e,a000"
,
},
{},
};
static
struct
of_platform_driver
sabre_driver
=
{
.
name
=
DRIVER_NAME
,
.
match_table
=
sabre_match
,
.
probe
=
sabre_probe
,
};
static
int
__init
sabre_init
(
void
)
{
return
of_register_driver
(
&
sabre_driver
,
&
of_bus_type
);
}
subsys_initcall
(
sabre_init
);
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