提交 e6a02746 编写于 作者: R Rusty Russell

virtio: define VIRTIO_PCI_CAP_PCI_CFG in header.

This provides backdoor access to the device MMIOs, and every device should
have one.  From the virtio 1.0 spec (CS03):

  4.1.4.7.1 Device Requirements: PCI configuration access capability

  The device MUST present at least one VIRTIO_PCI_CAP_PCI_CFG capability.
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Acked-by: NMichael S. Tsirkin <mst@redhat.com>
上级 5e05bf58
......@@ -109,8 +109,10 @@
#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
/* ISR access */
#define VIRTIO_PCI_CAP_ISR_CFG 3
/* Device specific confiuration */
/* Device specific configuration */
#define VIRTIO_PCI_CAP_DEVICE_CFG 4
/* PCI configuration access */
#define VIRTIO_PCI_CAP_PCI_CFG 5
/* This is the PCI capability header: */
struct virtio_pci_cap {
......
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