ASoC: cs42l56: Make ID registers volatile and remove cache bypass
Rather than manually enabling cache bypass when reading the ID registers simply remove the default which will cause the first read to go to the hardware. The old code worked this is simply the more standard way to implement this. Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: NBrian Austin <brian.austin@cirrus.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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