提交 d2fc8db6 编写于 作者: M Milton Miller 提交者: Wim Van Sebroeck

watchdog: aspeed: Fix translation of reset mode to ctrl register

Assert RESET_SYSTEM bit for any reset and set MODE field from reset
type.

The watchdog control register has a RESET_SYSTEM bit that is really
closer to activate a reset, and RESET_SYSTEM_MODE field that chooses
how much to reset.

Before this patch, a node without these optional property would do a
SOC reset, but a node with properties requesting a cpu or SOC reset
would do nothing and a node requesting a system reset would do a
SOC reset.

Fixes: b7f0b8ad ("drivers/watchdog: ASPEED reference dev tree properties for config")
Signed-off-by: NMilton Miller <miltonm@us.ibm.com>
Signed-off-by: NEddie James <eajames@linux.vnet.ibm.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
上级 977f6f68
...@@ -232,11 +232,14 @@ static int aspeed_wdt_probe(struct platform_device *pdev) ...@@ -232,11 +232,14 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM; wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;
} else { } else {
if (!strcmp(reset_type, "cpu")) if (!strcmp(reset_type, "cpu"))
wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU; wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU |
WDT_CTRL_RESET_SYSTEM;
else if (!strcmp(reset_type, "soc")) else if (!strcmp(reset_type, "soc"))
wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC; wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC |
WDT_CTRL_RESET_SYSTEM;
else if (!strcmp(reset_type, "system")) else if (!strcmp(reset_type, "system"))
wdt->ctrl |= WDT_CTRL_RESET_SYSTEM; wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP |
WDT_CTRL_RESET_SYSTEM;
else if (strcmp(reset_type, "none")) else if (strcmp(reset_type, "none"))
return -EINVAL; return -EINVAL;
} }
......
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