clk: cs2000: enable clock skipping mode
CLK_IN skipping mode allows the PLL to maintain lock even when the CLK_IN signal has missing pulses for up to 20 ms (t CS) at a time. This patch enables it Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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