提交 bd97abc0 编写于 作者: M Martin Blumenstingl 提交者: Kevin Hilman

ARM64: dts: meson-gxm: add SCPI configuration for GXM

This adds the SCPI DVFS clock index and configures the CPU cores
accordingly.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: NNeil Armstrong <narmstrong@baylibre.com>
Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: NKevin Hilman <khilman@baylibre.com>
上级 47961f13
...@@ -85,6 +85,7 @@ ...@@ -85,6 +85,7 @@
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu5: cpu@101 { cpu5: cpu@101 {
...@@ -93,6 +94,7 @@ ...@@ -93,6 +94,7 @@
reg = <0x0 0x101>; reg = <0x0 0x101>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu6: cpu@102 { cpu6: cpu@102 {
...@@ -101,6 +103,7 @@ ...@@ -101,6 +103,7 @@
reg = <0x0 0x102>; reg = <0x0 0x102>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu7: cpu@103 { cpu7: cpu@103 {
...@@ -109,10 +112,17 @@ ...@@ -109,10 +112,17 @@
reg = <0x0 0x103>; reg = <0x0 0x103>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
}; };
}; };
&scpi_dvfs {
clock-indices = <0 1>;
clock-output-names = "vbig", "vlittle";
};
&vpu { &vpu {
compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
}; };
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